1、 REVISIONS LTR DESCRIPTION DATE APPROVED Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY RAJESH PITHADIA DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY RAJE
2、SH PITHADIA TITLE MICROCIRCUIT, LINEAR, VOLTAGE REFERENCE, MONOLITHIC SILICON 11-09-20 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/11615 REV PAGE 1 OF 9 AMSC N/A 5962-V090-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-
3、DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11615 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a precision, micropower, shunt , voltage reference, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Admin
4、istrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/11615 - 01 X B Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2
5、) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 LM4040-EP Precision, micropower, shunt, voltage reference 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 3 TO-236-AB Plastic small outline 1.2.3
6、 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permi
7、tted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11615 REV PAGE 3 1.3 Absolute maximum ratings. 1/ Continuous cathode current (IZ) . -10 mA min to 25 mA max Storage temperature range (TSTG) -65C to +150C Operating virtual junction tempera
8、ture (TJ) +150C Thermal resistance, junction-to- ambient (JA) 2/ 320.8C/W Thermal resistance, junction-to- case (JC) . 98.2C/W Thermal resistance, junction-to- board (JA) 3/ . 53.3C/W Junction-to-top characterization parameter (JT) 4/ 3.3C/W Junction-to-board characterization parameter (JB) 5/ 51.8C
9、/W 1.4 Recommended operating conditions. 6/ Cathode current (IZ) 15 mA max Operating free-air temperature range (TA) -55C to +125C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the
10、device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The junction-to-ambient thermal resistance under natural convection is obtained
11、 in a simulation on a JEDEC standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. 3/ The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the printed circuit board (PCB) temperature, as de
12、scribed in JESD51-8. 4/ The junction-to-top characterization parameter, JT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining JA, using a procedure described in JESD51-2a (sections 6 and 7). 5/ The junction-to-top characterization
13、 parameter, JB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining JA, using a procedure described in JESD51-2a (sections 6 and 7). 6/ Use of this product beyond the manufacturers design rules or stated parameters is done at the us
14、ers risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO.
15、V62/11615 REV PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices JESD51-2A - Integrated Circuits Thermal Test Method Environmental Conditions Natural Convection (Still Air) JESD51-7 - High Effective Thermal Conductivity Test Board for Leaded Surfac
16、e Mount Packages JESD51-8 - Integrated Circuit Thermal Test Method Environmental Conditions Junction-to-Board (Applications for copies should be addressed to the JEDEC Office, 3103 North 10th Street, Suite 240-S, Arlington, VA 22201-2107 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking.
17、 Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part
18、number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, constructio
19、n, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted wit
20、hout license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11615 REV PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions Temperature, TA Device type Limits Unit Min Max Reverse breakdown voltage VZIZ= 100 A +25C 01 2.5 typical
21、 V Reverse breakdown voltage tolerance VZIZ= 100 A +25C 01 -16 mV -55C to +125C -42 Minimum cathode current IZ, min+25C 01 75 A -55C to +125C 80 Average temperature coefficient of reverse breakdown voltage VZIZ= 10 mA 25C 01 20 typical ppm/C IZ= 1 mA 25C 15 typical -55C to +125C 100 IZ= 100 A 25C 15
22、 typical Reverse breakdown voltage change with cathode current change VZ/IZIZ, min IZ 1 mA 25C 01 0.8 mV -55C to +125C 1 1 mA IZ 15 mA 25C 6 -55C to +125C 8 Reverse dynamic impedance ZZIZ= 1 mA, f = 120 Hz, IAC= 0.1IZ25C 01 0.3 typical Wideband noise eNIZ= 100 A, 10 Hz f 10 kHz 25C 01 35 typical VRM
23、SLong term stability of reverse breakdown voltage t = 1000 h, IZ= 100 A, TA= 25C 0.1C 01 120 typical ppm Thermal hysteresis 2/ VHYST TA= -55C to +125C 01 0.08 typical % 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the spec
24、ified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ Thermal hysteresis is defined as VZ,2
25、5C(after cycling to -55C) VZ,25C(after cycling to 125C). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11615 REV PAGE 6 Case X FIGURE 1. Case outline. Provided by IHSNot f
26、or ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11615 REV PAGE 7 Case X continued. Symbol Dimensions Millimeters Min Max A 0.89 1.12 A1 0.88 1.02 A2 0.01 0.10 b 0.30 0.50 c 0.08 0.20 D 2.80 3.0
27、4 E 1.20 1.40 E1 2.10 2.64 e 0.95 BSC e1 1.90 BSC L 0.20 0.60 L1 0.25 BSC NOTES: 1. Controlling dimensions are millimeters. 2. Body dimensions are exclusive of mold flash and protrusion. Mold flash and protrusion not to exceed 0.25 per side. 3. Falls within reference to JEDEC TO-236-AB. FIGURE 1. Ca
28、se outline - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11615 REV PAGE 8 Device type 01 Case outline X Terminal number Terminal symbol 1 CATHODE 2 ANODE 3 SE
29、E NOTE 1 NOTE: 1. Pin 3 is attached to substrate and must be connected to ANODE or left open. FIGURE 2. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62
30、/11615 REV PAGE 9 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, p
31、ackaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS.
32、 Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. Th
33、is drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control
34、 number 1/ Device manufacturer CAGE code Vendor part number Top side marking 2/ V62/11615-01XB 01295 LM4040C25MDBZTEP SAGU 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. 2/ The actual top side marking has one additio
35、nal character that designates the wafer fab/assembly site. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-
