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    DLA DSCC-VID-V62 06660 REV A-2008 MICROCIRCUIT DIGITAL LOW VOLTAGE CMOS QUADRUPLE 2-INPUT POSITIVE NOR GATE MONOLITHIC SILICON.pdf

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    DLA DSCC-VID-V62 06660 REV A-2008 MICROCIRCUIT DIGITAL LOW VOLTAGE CMOS QUADRUPLE 2-INPUT POSITIVE NOR GATE MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Correct the drawing number in paragraph 1.2 on page 2. - CFS 08-06-04 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV A A REV STATUS OF PAGES PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Charles F. Saffl

    2、e DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle APPROVED BY Thomas M. Hess TITLE MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, QUADRUPLE 2-INPUT POSITIVE NOR GATE, MONOLITHIC SILICON SIZE A CODE IDENT. NO. 16236 DWG NO. V62/06660 YY-MM-DD

    3、08-05-05 REV A PAGE 1 OF 11 AMSC N/A 5962-V049-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06660 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the

    4、 general requirements of a high performance quadruple 2-input positive NOR gate microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an admin

    5、istrative control number for identifying the item on the engineering documentation: V62/06660 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device types. Device type Generic Circuit function 01 SN74LVC02A-EP Quadruple 2-input positive NOR gate

    6、 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 14 MO-153 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator M

    7、aterial A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06660 REV PAGE 3

    8、1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to 6.5 V Input voltage range (VI). -0.5 V to 6.5 V 2/ Output voltage range (VO) . -0.5 V to VCC+ 0.5 V 2/ 3/ Input clamp current (IIK) (VI 0) -50 mA Output clamp current (IOK) (VO 0) . -50 mA Continuous output current (IO). 50 mA C

    9、ontinuous current through VCCor GND. 100 mA Package thermal impedance (JA): 4/ X package . 113C/W Storage temperature range (TSTG). -65C to 150C 1.4 Recommended operating conditions. 5/ Supply voltage range (VCC): Operating. 2.0 V to 3.6 V Data retention only 1.5 V minimum Minimum high level input v

    10、oltage (VIH) (VCC= 2.7 V to 3.6 V) . 2.0 V Maximum low level input voltage (VIL) (VCC= 2.7 V to 3.6 V) 0.8 V Input voltage range (VI). 0.0 V to 5.5 V Output voltage range (VO) . 0.0 V to VCCMaximum high level output current (IOH): VCC= 2.7 V -12 mA VCC= 3.0 V -24 mA Maximum low level output current

    11、(IOL): VCC= 2.7 V 12 mA VCC= 3.0 V 24 mA Input transition rise or fall rate (t/v) . 0 to 8 ns/V Operating free-air temperature range (TA). -55C to +125C 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and funct

    12、ional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output negative-voltage ratings may be exc

    13、eeded if the input and output current ratings are observed. 3/ The value of VCCis provided in the recommended operating conditions table. 4/ The package thermal impedance is calculated in accordance with JESD 51-7. 5/ All unused inputs of the device must be held at VCCor GND to ensure proper device

    14、operation. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06660 REV PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 - Registered and Standard Outlines for Semiconduct

    15、or Devices JEDEC STD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marki

    16、ng. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers pa

    17、rt number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construc

    18、tion, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal

    19、connections. The terminal connections shall be as shown in figure 4. 3.5.5 Test circuit and timing waveforms. The test circuit and timing waveforms shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER,

    20、COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06660 REV PAGE 5 TABLE I. Electrical performance characteristics. 1/ Limits Test Symbol Conditions VCCTemperature, TADevice type Min Max Unit IOH= -100 A 2.7 V to 3.6 V VCC 0.2 2.7 V 2.2 IOH= -12 mA 3.0 V 2.4 High level output voltage V

    21、OHIOH= -24 mA 3.0 V 2.2 V IOL= 100 A 2.7 V to 3.6 V 0.2 IOL= 12 mA 2.7 V 0.4 Low level output voltage VOLIOL= 24 mA 3.0 V 0.55 V Input current IIVI= 5.5 V or GND 3.6 V 5 A Quiescent supply current ICCVI= VCCor GND IO= 0 A 3.6 V 10 A Quiescent supply current delta ICCOne input at VCC 0.6 V, Other inp

    22、uts at VCCor GND 2.7 V to 3.6 V -55C to 125C 500 A Input capacitance CiVI= VCCor GND 3.3 V 5 TYP pF 2.5 V 8.5 TYP Power dissipation capacitance per gate Cpdf = 10 MHz 3.3 V 25C 9.5 TYP pF 2.7 V 6.5 Propagation delay time, A or B to Y tpdSee figure 5. 3.0 V to 3.6 V -55C to 125C All 1 5.5 ns 1/ Testi

    23、ng and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific par

    24、ametric testing, product performance is assured by characterization and/or design. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06660 REV PAGE 6 Case X NOTES: 1

    25、. All linear dimensions are in millimeters (inches). 2. This case outline is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion, not to exceed 0.15 millimeters (0.006 in). 4. Falls within JEDEC MO-153. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo

    26、 reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06660 REV PAGE 7 Case X Dimensions Millimeters Inches Symbol Min Max Min Max A - 1.20 - 0.047 A1 0.05 0.15 0.002 0.006 b 0.19 0.30 0.007 0.012 c 0

    27、.15 NOM 0.006 NOM D 4.90 5.10 0.193 0.201 E 4.30 4.50 0.169 0.177 E1 6.20 6.60 0.244 0.260 e 0.65 BSC 0.026 BSC L 0.50 0.75 0.020 0.030 FIGURE 1. Case outlines - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMB

    28、US COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06660 REV PAGE 8 (each gate) Inputs Output A B Y H X L X H L L L H H = High voltage level L = Low voltage level X = Immaterial FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitte

    29、d without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06660 REV PAGE 9 Device type 01 Case outline X Terminal number Terminal symbol 1 1Y 2 1A 3 1B 4 2Y 5 2A 6 2B 7 GND 8 3A 9 3B 10 3Y 11 4A 12 4B 13 4Y 14 VCCFIGURE 4. Terminal connecti

    30、ons. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06660 REV PAGE 10 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses are supplied by generato

    31、rs having the following characteristics: PRR 10 MHz, ZO= 50 . 3. tPLHand tPHLare the same as tpd. 4. The outputs are measured one at a time with one input transition per measurement. FIGURE 5. Test circuit and timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted wit

    32、hout license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06660 REV PAGE 11 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal do

    33、cumentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with

    34、the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of

    35、the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of

    36、 present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top side marking V62/06660-01XE 01295 SN74LVC02AMPWREP LVC02AM 1/ The vendor item drawing establishes an administrative control

    37、 number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-


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