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    DLA DSCC-VID-V62 04753 REV C-2013 MICROCIRCUIT DIGITAL FLOATING POINT DIGITAL SIGNAL PROCESSOR MONOLITHIC SILICON.pdf

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    DLA DSCC-VID-V62 04753 REV C-2013 MICROCIRCUIT DIGITAL FLOATING POINT DIGITAL SIGNAL PROCESSOR MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Correct lead finish for device 04. Update boilerplate. - CFS 05-12-02 Thomas M. Hess B Add device types 05-20. Editorial chances throughout. - PHN 06-01-11 Thomas M. Hess C Update boilerplate paragraphs to current requirements. - PHN 13-09-12 Thomas M. Hess

    2、 CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV C C C C C C C PAGE 62 63 64 65 66 67 68 REV C C C C C C C C C C C C C C C C C C C C C C PAGE 40 41 42 43 44 45 46 47 48 49 50

    3、 51 52 53 54 55 56 57 58 59 60 61 REV C C C C C C C C C C C C C C C C C C C C C C PAGE 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 REV STATUS OF PAGES REV C C C C C C C C C C C C C C C C C PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 PMIC N/A PREPARED BY Phu H. Nguyen DEFENSE

    4、 SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, FLOATING POINT DIGITAL SIGNAL PROCESSOR, MONOLITHIC SILICON YY MM DD 04-12-08 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04753 REV C PAGE 1 OF 68

    5、 AMSC N/A 5962-V081-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04753 REV C PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a

    6、high performance Floating-Point Digital Signal Processor microcircuit, with an operating temperature range of -40C to +105C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control numbe

    7、r for identifying the item on the engineering documentation: V62/04753 - 01 X A Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). 1/ Device type Generic Circuit function 01 SM320C6711-16EP Floating Point Digital Signal Processor 02 SM320C67

    8、11B-16EP Floating Point Digital Signal Processor 03 SM320C6711C-16EP Floating Point Digital Signal Processor 04 SM320C6711D-16EP Floating Point Digital Signal Processor 05 SM320C6711-10EP Floating Point Digital Signal Processor 06 SM320C6711B-10EP Floating Point Digital Signal Processor 07 SM320C671

    9、1C-10EP Floating Point Digital Signal Processor 08 SM320C6711D-10EP Floating Point Digital Signal Processor 09 SM320C6711-15EP Floating Point Digital Signal Processor 10 SM320C6711B-15EP Floating Point Digital Signal Processor 11 SM320C6711C-15EP Floating Point Digital Signal Processor 12 SM320C6711

    10、D-15EP Floating Point Digital Signal Processor 13 SM320C6711-20EP Floating Point Digital Signal Processor 14 SM320C6711B-20EP Floating Point Digital Signal Processor 15 SM320C6711C-20EP Floating Point Digital Signal Processor 16 SM320C6711D-20EP Floating Point Digital Signal Processor 17 SM320C6711-

    11、25EP Floating Point Digital Signal Processor 18 SM320C6711B-25EP Floating Point Digital Signal Processor 19 SM320C6711C-25EP Floating Point Digital Signal Processor 20 SM320C6711D-25EP Floating Point Digital Signal Processor 1.2.2 Case outline(s). The case outlines are as specified herein. Outline l

    12、etter Number of pins Package style X 256 Plastic ball grid array Y 272 Plastic ball grid array 1/ Users are cautioned to review the manufacturers data manual for additional user information relating to this device. Provided by IHSNot for ResaleNo reproduction or networking permitted without license

    13、from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04753 REV C PAGE 3 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead p

    14、late C Gold plate D Palladium E Gold flash palladium Z Other 1.3 Absolute maximum ratings. 2/ Supply voltage ranges, (CVDD): 3/ Device type 03, 04, 07, 08, 11, 12, 15, 16, 19 and 20 only . -0.3 V to +1.8 V Device type 01, 02, 05, 06, 09, 10, 13, 14, 17 and 18 -0.3 V to +2.3 V Supply voltage ranges,

    15、(DVDD) . -0.3 V to +4.0 V 3/ Input voltage ranges: (VI): Device type 03, 04, 07, 08, 11, 12, 15, 16, 19 and 20 only . -0.3 V to DVDD+ 0.5 V Device type 01, 02, 05, 06, 09, 10, 13, 14, 17 and 18 -0.3 V to +4.0 V Output voltage ranges: (VO) Device type 03, 04, 07, 08, 11, 12, 15, 16, 19 and 20 only .

    16、-0.3 V to DVDD+ 0.5 V Device type 01, 02, 05, 06, 09, 10, 13, 14, 17 and 18 -0.3 V to +4.0 V Operating case temperature ranges, (TC): (default) 0C to +90C (A version): Case outline X, device type 02, 06, 10, 14, and 18 . -40C to +105C Case outline Y, device type 03, 07, 11, 15, and 19 -40C to +105C

    17、Storage temperature range, (TSTG) . -65C to +150C 1.4 Recommended operating conditions. 4/ Min Max Unit Supply voltage, Core (CVDD) Device type 20 only 1.33 1.47 V Device type 03, 04, 07, 08, 11, 12, 15, 16, 19 and 20 only 1.14 5/ 1.32 Device type 02, 05, 06, 10, 14, and 18 1.71 1.89 Device type 09

    18、only 1.80 2.00 Supply voltage, I/O (DVDD) Device type 03, 04, 07, 08, 11, 12, 15, 16, 19 and 20 3.13 3.47 V Device type 01, 02, 05, 06, 09, 10, 13, 14, 17 and 18 3.14 3.46 2/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratin

    19、gs only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 3/ All voltage values are with respect to

    20、 VSS. 4/ For device type 01, 02, 05, 06, 09, 10, 13, 14, 17 and 18, the core supply should be powered up at the same time as, or prior to (and powered down after), the I/O supply. For device type 03, 04, 07, 08, 11, 12, 15, 16, 19 and 20, the core supply should be powered up prior to (and powered do

    21、wn after), the I/O supply. Systems should be designed to ensure that neither supply is powered up for an extended period of time if the other supply is below the proper operating voltage. 5/ These values are compatible with existing 1.26 V designs. Provided by IHSNot for ResaleNo reproduction or net

    22、working permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04753 REV C PAGE 4 1.4 Recommended operating conditions - Continued. Min Max Unit Supply ground, (VSS) 0 0 V High level input voltage, (VIH) Device type 03, 04, 07, 0

    23、8, 11, 12, 15, 16, 19 and 20 only All signals except CLKS1, DR1, RESET 2 V CLKS1, DR1, RESET 2 Device type 01, 02, 05, 06, 09, 10, 13, 14, 17 and 18 2 Low level input voltage, (VIL) Device type 03, 04, 07, 08, 11, 12, 15, 16, 19 and 20 only All signals except CLKS1, DR1, RESET 0.8 V CLKS1, DR1, RESE

    24、T 0.3*DVDDDevice type 01, 02, 05, 06, 09, 10, 13, 14, 17 and 18 0.8 High level output current, (IOH) Device type 01, 02, 05, 06, 09, 10, 13, 14, 17 and 18 All signals except CLKOUT1, CLKOUT2, and ECLKOUT -4 mA CLKOUT1, CLKOUT2, and ECLKOUT -8 Device type 03, 07, 11, 15, 19 6/ All signals except ECKL

    25、OUT, CLKOUT2, CLKOUT3, CLKS1, and DR1 -8 mA ECKLOUT, CLKOUT2, and CLKOUT3 -16 Device type 04, 08, 12, 16, 20 5/ All signals except ECKLOUT, CLKOUT2, CLKS1, and DR1 -8 mA ECKLOUT, and CLKOUT2 -16 Low level output current, (IOL) Device type 01, 02, 05, 06, 09, 10, 13, 14, 17 and 18 All signals except

    26、CLKOUT1, CLKOUT2, and ECLKOUT 4 mA CLKOUT1, CLKOUT2, and ECLKOUT 8 Device type 03, 07, 11, 15, 19 5/ All signals except ECLKOUT, CLKOUT2, CLKOUT3, CLKS1, and DR1 8 mA ECKLOUT, CLKOUT2, CLKOUT3 16 CLKS1 and DR1 3 Device type 04, 08, 12, 16, 20 5/ All signals except ECKLOUT, CLKOUT2, CLKS1, and DR1 8

    27、mA ECKLOUT and CLKOUT2 16 CLKS1 and DR1 3 Operating temperature, (TC) Default 0 90 C A versionCase outline X and Y -40 105 I version -40 80 6/ Refers to DC (or steady state) currents only, actual switching currents are higher. For more details, see manufacturer data device specific IBIS models. Prov

    28、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04753 REV C PAGE 5 1.4 Recommended operating conditions - Continued. Thermal resistance characteristics for case X (dev

    29、ice type 01, 02, 05, 06, 09, 10, 13, 14, 17 and 18 only) Air Flow (m/s) 7/ C/W Junction to case, (RJC) N/A 6.4 Junction to free air, (RJA) 0.0 25.5 Junction to free air, (RJA) 0.5 23.1 Junction to free air, (RJA) 1.0 22.3 Junction to free air, (RJA) 2.0 21.2 Thermal resistance characteristics for ca

    30、se Y (device type 03, 04, 07, 08, 11, 12, 15, 16, 19 and 20 only) Air Flow (m/s) 7/ C/W Junction to case, (RJC) N/A 9.7 Junction to package top (PsiJT) 0.0 1.5 Junction to board, (RJB) N/A 19 Junction to free air, (RJA) 0.0 22 Junction to free air, (RJA) 0.5 21 Junction to free air, (RJA) 1.0 20 Jun

    31、ction to free air, (RJA) 2.0 19 Junction to free air, (RJA) 4.0 18 Junction to board, (PsiJB) 0.0 16 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.

    32、jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201-2107). 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE

    33、code, or logo B. Pin 1 identifier C. ESDS identification (optional) _ 7/ m/s = meters per second. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04753 REV C PAGE

    34、6 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and tabl

    35、e I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as show

    36、n in figure 2. 3.5.3 Block diagram. The block diagram shall be as specified in figure 3. 3.5.4 Test load circuits. The test load circuits shall be as specified in figure 4. 3.5.5 Board level input/output timings. The board level input/output timings shall be as specified in figure 5. 3.5.6 Timing wa

    37、veforms. The timing waveforms shall be as shown in figure 6-36. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04753 REV C PAGE 7 TABLE I. Electrical performance

    38、characteristics. 1/ Test Symbol Test condition 2/ Device type Limits Unit Min Max High level output voltage VOHAll signals DVDD= min, IOH= max 3/ 4/ 2.4 V All signals except CLKS1 and DR1 5/ 6/ 2.4 Low level output voltage VOLAll signals DVDD= min, IOL= max 3/ 4/ 0.4 V All signals except CLKS1 and D

    39、R1 5/ 6/ 0.4 CLKS1 and DR1 5/ 6/ 0.4 Input current IIAll signals VI= VSSto DVDD3/ 4/ 150 A All signals except CLKS1 and DR1 5/ 6/ 170 CLKS1 and DR1 5/ 6/ 10 Off state output current IOZAll signals VO= DVDD or 0 V 3/ 4/ 10 A All signals except CLKS1 and DR1 5/ 6/ 170 CLKS1 and DR1 5/ 6/ 10 Core suppl

    40、y current 7/ IDD2VCVDD= 1.40 V, CPU clock = 250 MHz 6/ 810 Typ mA CVDD= 1.26 V, CPU clock = 200 MHz 5/ 560 Typ CVDD= 1.26 V, CPU clock = 200 MHz 6/ 560 Typ CVDD= 1.26 V, CPU clock = 167 MHz 5/ 475 Typ CVDD= 1.26 V, CPU clock = 167 MHz 6/ 475 Typ I/O supply current 7/ IDD3VDVDD= 3.3 V, EMIF speed = 1

    41、00 MHz 5/ 6/ 75 Typ mA Supply current, CPU + CPU memory access 8/ IDD2VCVDD= NOM, CPU clock = 150 MHz 3/ 433 Typ mA 4/ 410 Typ Supply current, peripherals 8/ IDD2V3/ 232 Typ 4/ 220 Typ Supply current, I/O pins 8/ IDD3VDVDD= NOM, CPU clock = 150 MHz 3/ 60 Typ mA 4/ 60 Typ Input capacitance CiAll 7 pF

    42、 Output capacitance CoAll 7 pF See notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04753 REV C PAGE 8 TABLE I. Electrical performance charac

    43、teristics - Continued. No Test Symbol Test conditions 2/ Limits Limits Limits Limits Unit Min Max Min Max Min Max Min Max INPUT AND OUTPUT CLOCKS Timing requirements for CLKIN 10/ 11/ Device type 05, 06 Device type 09, 10 CLKMODE = x4 CLKMODE = x1 CLKMODE = x4 CLKMODE = x1 1 Cycle time, CLKIN tc(CLK

    44、IN)See figure 6 40 10 26.7 6.7 ns 2 Pulse duration, CLKIN high tw(CLKINH)0.4C 0.45C 0.4C 0.45C 3 Pulse duration, CLKIN low tw(CLKINL)0.4C 0.45C 0.4C 0.45C 4 Transaction time, CLKIN tt(CLKIN)5 1 5 1 Timing requirements for CLKIN 10/ 11/ 12/ Device type (03, 04)K29/ Device type 15, 16 PLL MODE (PLLEN

    45、= 1) BYPASS MODE (PLLEN = 0) PLL MODE (PLLEN = 1) BYPASS MODE (PLLEN = 0) 1 Cycle time, CLKIN tc(CLKIN)See figure 6 6 83.3 6 5 83.3 5 ns 2 Pulse duration, CLKIN high tw(CLKINH)0.4C 0.4C 0.4C 0.4C 3 Pulse duration, CLKIN low tw(CLKINL)0.4C 0.4C 0.4C 0.4C 4 Transaction time, CLKIN tt(CLKIN)5 5 5 5 Tim

    46、ing requirements for CLKIN 10/ 11/ 12/ Device type 20 PLL MODE (PLLEN = 1) BYPASS MODE (PLLEN = 0) 1 Cycle time, CLKIN tc(CLKIN)See figure 6 4 83.3 4 ns 2 Pulse duration, CLKIN high tw(CLKINH)0.4C 0.4C 3 Pulse duration, CLKIN low tw(CLKINL)0.4C 0.4C 4 Transaction time, CLKIN tt(CLKIN)5 5 See notes a

    47、t end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04753 REV C PAGE 9 TABLE I. Electrical performance characteristics Continued. No Test Symbol Test c

    48、onditions 2/ Limits Limits Unit Min Max Min Max INPUT AND OUTPUT CLOCKS (Continued) Switching characteristics for CLKOUT1 13/ 14/ 15/ Device type 05, 06, 09, 10 CLKMODE = x4 CLKMODE = x4 1 Cycle time, CLKOUT1 tc(CKO1)See figure 7 P-0.7 P+0.7 P-0.7 P+0.7 ns 2 Pulse duration, CLKOUT1 high tw(CKO1H)(P/2)-0.7 (P/2)+0.7 PH-0.7 PH+0.7 3 Pulse duration, CLKOUT1 low tw(CKO1L)(P/2)-0.7 (P/2)+0.7 PH-0.7 PH+0


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