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    DLA DSCC-VID-V62 04718 REV A-2011 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS 3 3-V ABT 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf

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    DLA DSCC-VID-V62 04718 REV A-2011 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS 3 3-V ABT 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf

    1、 REVISIONSLTR DESCRIPTION DATE APPROVEDA Update boilerplate paragraphs to current requirements. - PHN 11-07-22 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV

    2、PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-V ABT 18-B

    3、IT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS, MONOLITHIC SILICON YY-MM-DD 04-05-04 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04718 REV A PAGE 1 OF 12 AMSC N/A 5962-V061-11 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEF

    4、ENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04718 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance 3.3-V ABT 18-bit universal bus driver with 3-state outputs microcircuit, with an operating temperature rang

    5、e of -40C to +85C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04718 - 01 X E Drawing Device type Case o

    6、utline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 SN74LVTH16835-EP 3.3-V ABT 18-bit universal bus driver with 3-state outputs 1.2.2 Case outline. The case outline is as specified herein. Outline letter Number of pins JEDEC PUB

    7、 95 Package style X 56 MO-153 Plastic small-outline1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other Provided b

    8、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04718 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to 4.6 V Input voltage range (VI) . -

    9、0.5 V to 7 V 2/ Voltage range applied to any output in the high-impedance or power-off state (VO) . -0.5 V to 7 V 2/ Voltage range applied to any output in the high state (VO) . -0.5 V to VCC+ 0.5 V 2/ Current into any output in the low state (IO) . 128 mA Current into any output in the high state (

    10、IO) . 64 mA 3/ Input clamp current (IIK) (VI 0) -50 mA Output clamp current (IOK) (VO 0) . -50 mA Package thermal impedance (JA) . 81C/W 4/ Storage temperature range (TSTG) . -65C to 150C 1.4 Recommended operating conditions. 5/ Supply voltage range (VCC) . 2.7 V to 3.6 V Minimum high level input vo

    11、ltage (VIH) 2 V Maximum low level input voltage (VIL0.8 V Maximum input voltage (VI) . 5.5 V Maximum high level output current (IOH) . -32 mA Maximum low level output current (IOL) . 64 mA Maximum input transition rise or fall rate (t/v) (Outputs enabled) 10 ns/V Minimum power-up ramp rate (t/VCC) 2

    12、00 s/V Operating free-air temperature range (TA) -40C to +85C 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices JEDEC STD 51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packag

    13、es (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are s

    14、tress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output negati

    15、ve-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3/ This current flows only when the output is in the high state and VO VCC. 4/ The package thermal impedance is calculated in accordance with JESD 51-7. 5/ All unused control inputs of the device must be h

    16、eld at VCCor GND to ensure proper device operation. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04718 REV A PAGE 4 3. REQUIREMENTS 3.1 Marking. Parts shall be

    17、permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with

    18、items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical

    19、dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Function table. The function table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. Th

    20、e terminal connections shall be as shown in figure 4. 3.5.5 Test circuit and timing waveforms. The test circuit and timing waveforms shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMB

    21、US, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04718 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Input clamp voltage VIKII= -18 mA 2.7 V 25C, -40C to 85C All -1.2 V High level output voltage VOHIOH= -100

    22、A 2.7 V to 3.6 V VCC 0.2 V IOH= -8 mA 2.7 V 2.4 IOH= -32 mA 3 V 2 Low level output voltage VOLIOL= 100 A 2.7 V 0.2 V IOL= 24 mA 0.5 IOL= 16 mA 3 V 0.4 IOL= 32 mA 0.5 IOL= 64 mA 0.55 Input current IIControl inputs. VI= VCCor GND 3.6 V 1 A Control inputs., VI= 5.5 V 0 V or 3.6 V 10 A inputs, VI= 5.5 V

    23、 3.6 V 10 A inputs, VI= VCC1 A inputs, VI= 0 V -5 Input/output power-off leakage current IoffVIor VO= 0 V to 4.5 V 0 V 100 A Input current (hold) II(hold)A inputs, VI= 0.8 V 3 V 75 AA inputs, VI= 2 V -75 A inputs. VI= 0 V to 3.6 V 2/ 3.6 V 500 3-state output current high IOZHVO= 3 V 3.6 V 5 A 3-stat

    24、e output current low IOZPDVO= 0.5 V 3.6 V -5 A 3-state output current power-up IOZPUVO= 0.5 V to 3 V OE = dont care 0 V to 1.5 V 100 A 3-state output current power-down IOZPDVO= 0.5 V to 3 V OE = dont care 1.5 V to 0 V 100 A Quiescent supply current ICCOutputs high. VI= VCCor GND, IO= 0 A 3.6 V 0.19

    25、 mA Outputs low. VI= VCCor GND, IO= 0 A 5 Outputs disabled. VI= VCCor GND, IO= 0 A 0.19 Quiescent supply current delta ICC3/ One input at VCC 0.6 V, Other inputs at VCCor GND 3 V to 3.6 V 0.2 mA Input capacitance CiVI= 3 V or 0 V 3.3 V 25C 3.5 TYP pF Input/output capacitance CioVO= 3 V or 0 V 9 TYP

    26、pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04718 REV A PAGE 6 TABLE I. Electrical performance characteristics - Continued. T

    27、est Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Clock frequency fclock2.7 V 25C, -40C to 85C 150 MHz 3.3 V 0.3 V 150 Pulse duration, LE high twSee figure 5. 2.7 V 3.3 ns 3.3 V 0.3 V 3.3 Pulse duration, CLK high or low 2.7 V 3.3 3.3 V 0.3 V 3.3 Setup time, data before CLK tsu

    28、2.7 V 2.4 ns 3.3 V 0.3 V 2.1 Setup time, data before LE, CLK high 2.7 V 1.5 ns 3.3 V 0.3 V 2.3 Setup time, data before LE, CLK low 2.7 V 0.5 ns 3.3 V 0.3 V 1.5 Hold time, data after CLK th See figure 5. 2.7 V 0 3.3 V 0.3 V 1 Hold time, data after LE 2.7 V 0.8 3.3 V 0.3 V 0.8Maximum frequency fmaxCL

    29、= 50 pF 2.7 V 150 MHz 3.3 V 0.3 V 150 Propagation delay time, A to Y tPLHCL= 50 pF See figure 5. 2.7 V 4 ns 3.3 V 0.3 V 1.3 3.7 tPHL2.7 V 4 3.3 V 0.3 V 1.3 3.7 Propagation delay time, LE to Y tPLH2.7 V 5.73.3 V 0.3 V 1.5 5.1 tPHL2.7 V 5.73.3 V 0.3 V 1.5 5.1 Propagation delay time, CLK to Y tPLH2.7 V

    30、 5.73.3 V 0.3 V 1.5 5.1 tPHL2.7 V 5.73.3 V 0.3 V 1.5 5.1 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04718 REV A PAGE 7 TABLE I.

    31、 Electrical performance characteristics Continued. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Propagation delay time, output enable, OE to Y tPZHCL= 50 pF See figure 5. 2.7 V 25C, -40C to 85C All 5.5 ns 3.3 V 0.3 V 1.3 4.6 tPZL2.7 V 5.53.3 V 0.3 V 1.3 4.6 Propagation

    32、 delay time, output disable, OE to Y tPHZ2.7 V 6.3ns 3.3 V 0.3 V 1.7 5.8 tPLZ2.7 V 6.33.3 V 0.3 V 1.7 5.8 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested

    33、across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch

    34、 the input from one state to another. 3/ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCCor GND. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS

    35、, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04718 REV A PAGE 8 Case X Dimensions Symbol Millimeters Inches Symbol Millimeters Inches Min Max Min Max Min Max Min Max A - 1.20 - 0.047 E 6.00 6.20 0.236 0.244 A1 0.05 0.15 0.002 0.006 E1 7.90 8.30 0.311 0.327 b 0.17 0.27 0.007 0.011 e 0.50 BSC 0.020

    36、BSC c 0.15 NOM 0.006 NOM L 0.50 0.75 0.020 0.030 D 13.90 14.10 0.547 0.555 NOTES: 1. All linear dimensions are in millimeters (inches). 2. This case outline is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion, not to exceed 0.15 millimeters (0.006 in). 4.

    37、Fall within JEDEC MO-153. FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04718 REV A PAGE 9 Function Table Inputs Output Y OE LE CLK A H L

    38、 L L L L L X H H L L L L X X X H L X L H L H X X Z L H L H Y01/ Y02/ H = High voltage level L = Low voltage level X = Immaterial = Transition from low-to-high 1/ Output level before the indicated steady-state input conditions were established, provided that CLK is high before LE goes low. 2/ Output

    39、level before the indicated steady-state input conditions were established. FIGURE 2. Function table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 D

    40、WG NO. V62/04718 REV A PAGE 10 Device type 01 Case outline X Terminal number Terminal symbol Terminal number Terminal symbol 1 NC 29 GND 2 NC 30 CLK 3 Y1 31 A184 GND 32 GND 5 Y2 33 A17 6 Y3 34 A167 VCC35 VCC8 Y4 36 A159 Y5 37 A14 10 Y6 38 A1311 GND 39 GND 12 Y7 40 A12 13 Y8 41 A1114 Y9 42 A10 15 Y10

    41、 43 A9 16 Y11 44 A8 17 Y12 45 A7 18 GND 46 GND 19 Y13 47 A6 20 Y14 48 A5 21 Y15 49 A4 22 VCC50 VCC23 Y16 51 A3 24 Y17 52 A2 25 GND 53 GND 26 Y18 54 A1 27 OE 55 NC 28 LE 56 GND FIGURE 4. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH

    42、S-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04718 REV A PAGE 11 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2

    43、is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO= 50 , tr 2.5 ns, and tf 2.5 ns. 4. The outputs are measured one at a time with one in

    44、put transition per measurement. FIGURE 5. Test circuit and timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04718 REV A PAGE 12 4. VERIFICATION 4.

    45、1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture s

    46、ensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge

    47、 sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device


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