1、 REVISIONSLTR DESCRIPTION DATE APPROVEDA Update boilerplate paragraphs to current requirements. - PHN 11-04-19 David J. Corbett CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing RE
2、V PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, QUADRUPLE 2-INPUT POSITIVE A
3、ND GATE, MONOLITHIC SILICON YY-MM-DD 04-04-23 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04704 REV A PAGE 1 OF 10 AMSC N/A 5962-V038-11 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS
4、, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04704 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance quadruple 2-input positive AND gate microcircuit, with an operating temperature range of -40C to +125C. 1.2 Vendor Item Drawing Administrative C
5、ontrol Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04704 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.
6、3) 1.2.1 Device type(s). Device type Generic Circuit function 01 CD74HC08-EP Quadruple 2-input positive AND gate 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 14 MS-012 Plastic small-outline1.2.3 Lead finishes. The lead fin
7、ishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-
8、,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04704 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to +7 V Input clamp current (IIK) (VIVCC+ 0.5 V) 20 mA 2/ Output clamp current (IOK) (VOVCC+ 0.5 V) 20 mA 2/ Continuous o
9、utput current (IO) (VO -0.5 V or VO VCC+0.5 V) . 25 mA Continuous current through VCCor GND . 50 mA Package thermal impedance (JA) . 180C/W 3/ Maximum junction temperature (TJ) 150C Lead temperature (during soldering): At distance 1/16 1/32 inch (1.59 0.79 mm) from case for 10 s max. . 300C Storage
10、temperature range (TSTG) . -65C to +150C 1.4 Recommended operating conditions. 4/ 5/ Supply voltage range (VCC) . 2 V to 6 V Minimum high level input voltage (VIH): VCC= 2 V . 1.5 V VCC= 4.5 V 3.15 V VCC= 6 V . 4.2 V Maximum low level input voltage (VIL): VCC= 2 V . 0.5 V VCC= 4.5 V 1.35 V VCC= 6 V
11、. 1.8 V Input voltage range (VI) . 0 V to VCCOutput voltage range (VO) . 0 V to VCCMaximum input transition rise or fall rate (t/v): VCC= 2 V . 1000 ns VCC= 4.5 V 500 ns VCC= 6 V . 400 ns Operating free-air temperature range (TA) -40C to +125C 1/ Stresses beyond those listed under “absolute maximum
12、rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods
13、may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3/ The package thermal impedance is calculated in accordance with JESD 51-7. 4/ All unused inputs of the device must be held at VCCor GND to ensure proper devi
14、ce operation. 5/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or networking
15、 permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04704 REV A PAGE 4 2. APPLICABLE DOCUMENTS ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices JEDEC STD 51-7 - Hig
16、h Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of these documents are available online at http:/www.eia.org or from the Electronic Industries Alliance, Technology Strategy & Standards Department, 2500 Wilson Boulevard, Arlington, VA 22201.) 3. REQUIREMENTS 3.1
17、Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacture
18、rs part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, con
19、struction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Termin
20、al connections. The terminal connections shall be as shown in figure 4. 3.5.5 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTE
21、R, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04704 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max High level output voltage VOHCMOS loads IOH= -0.02 mA VI= VIHor VIL2 V 25C, -40C to 125C
22、All 1.9 V 4.5 V 4.4 6 V 5.9 TTL loads IOH= -4 mA VI= VIHor VIL4.5 V 25C 3.98 -40C to 125C 3.7 TTL loads IOH= -5.2 mA VI= VIHor VIL6 V 25C 5.48 -40C to 125C 5.2 Low level output voltage VOLCMOS loads IOL= 0.02 mA VI= VIHor VIL2 V 25C, -40C to 125C All 0.1 V 4.5 V 0.1 6 V 0.1 TTL loads IOL= 4 mA VI= V
23、IHor VIL4.5 V 25C 0.26 -40C to 125C 0.4 TTL loads IOL= 5.2 mA VI= VIHor VIL6 V 25C 0.26 -40C to 125C 0.4 Input current IIVI= VCCor GND 6 V 25C 0.1 A -55C to 125C 1 Quiescent supply current ICCVI= VCCor GND IO= 0 A 6 V 25C 2 A -55C to 125C 40 Input capacitance CI25C, -40C to 125C 10 pF Power dissipat
24、ion capacitance per gate Cpd2/ No load. 5 V 25C 37 TYP pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04704 REV A PAGE 6 TABLE I
25、. Electrical performance characteristics - Continued. Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Propagation delay time, A or B to Y tpdCL= 50 pF See figure 5 2 V 25C All 90 ns -55C to 125C 135 4.5 V 25C 18 -55C to 125C 27 6 V 25C 15 -55C to 125C 23 CL= 15 pF See figure
26、 5 5 V 25C 7 TYP Transition time, A or B to Y ttCL= 50 pF 2 V 25C 75 ns -55C to 125C 110 4.5 V 25C 15 -55C to 125C 22 6 V 25C 13 -55C to 125C 19 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range.
27、 Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ CPDis used to determine the dynamic power consumption, per ga
28、te. PD= VCC2fi(CPD+ CL) fi= input frequency CL= output load capacitance VCC= supply voltage Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04704 REV A PAGE 7 Case
29、 X Dimensions Symbol Inches Millimeters Symbol Inches Millimeters Min Max Min Max Min Max Min Max A - .069 - 1.75 E .150 .157 3.81 4.00 A1 .004 .010 0.10 0.25 E1 .228 .244 5.80 6.20 b .014 .020 0.35 0.51 e .050 BSC 1.27 BSC c .008 NOM 0.20 NOM L .016 .044 0.40 1.12 D .337 .344 8.55 8.75 NOTES: 1. Al
30、l linear dimensions are in inches (millimeters). 2. This case outline is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion, not to exceed .006 inches (0.15 millimeters). 4. Fall within JEDEC MS-012. FIGURE 1. Case outline. Provided by IHSNot for ResaleNo re
31、production or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04704 REV A PAGE 8 (each gate) Inputs Output Y A B H L X H X L H L L H = High voltage level L = Low voltage level X = Immaterial FIGURE 2. Truth tabl
32、e. FIGURE 3. Logic diagram. Device type 01 Case outline X Terminal number Terminal symbol Terminal number Terminal symbol 1 1A 8 3Y 2 1B 9 3A 3 1Y 10 3B 4 2A 11 4Y 5 2B 12 4A 6 2Y 13 4B 7 GND 14 VCCFIGURE 4. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted w
33、ithout license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04704 REV A PAGE 9 Notes: 1. CLincludes probe and jig capacitance. 2. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr 6 ns, tf 6
34、ns. 3. The outputs are measured one at a time with one input transition per measurement. 4. tPLHand tPHLare the same as tpd. FIGURE 5. Timing waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS
35、COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04704 REV A PAGE 10 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handl
36、ing of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for elec
37、trostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufactu
38、rer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply
39、 for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/04704-01XE 01295 CD74HC08QM96EP HC08QEP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering docume
40、ntation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-
