1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 09-03-16 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV A A A A A A A A A A A REV STATUS OF PAGES PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED B
2、Y Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle APPROVED BY Thomas M. Hess TITLE MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS, MONOLITHIC SILICON SIZE A CODE IDENT.
3、NO. 16236 DWG NO. V62/03648 YY-MM-DD 03-08-12 REV A PAGE 1 OF 11 AMSC N/A 5962-V050-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03648 REV A PAGE 2 1. SCOPE
4、1.1 Scope. This drawing documents the general requirements of a high performance quadruple bus buffer gate with 3-state outputs microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identificati
5、on. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/03648 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01
6、 74AHC125-EP Quadruple bus buffer gate with 3-state outputs 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 14 JEDEC MO-153 Plastic small-outline Y 14 JEDEC MS-012 Plastic small-outline 1.2.3 Lead finishes. The lead finishes
7、are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-
8、DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03648 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to +7.0 V Input voltage range (VI). -0.5 V to +7.0 V 2/ Output voltage range (VO) . -0.5 V to VCC+ 0.5 V 2/ Input clamp curre
9、nt (IIK) (VIVCC) 20 mA Continuous output current (IO) (VO= 0 to VCC) 25 mA Continuous current through VCCor GND. 50 mA Package thermal impedance (JA): X package . 113C/W 3/ Y package . 86C/W 3/ Storage temperature range (TSTG). -65C to +150C 1.4 Recommended operating conditions. 4/ 5/ Supply voltage
10、 range (VCC) . 2.0 V to 5.5 V Minimum high level input voltage (VIH): VCC= 2.0 V 1.5 V VCC= 3.0 V 2.1 V VCC= 5.5 V 3.85 V Maximum low level input voltage (VIL): VCC= 2.0 V 0.5 V VCC= 3.0 V 0.9 V VCC= 5.5 V 1.65 V Input voltage range (VI). 0.0 V to 5.5 V Output voltage range (VO) . 0.0 V to VCCMaximu
11、m high level output current (IOH): VCC= 2.0 V -50 A VCC= 3.3 V 0.3 V. -4.0 mA VCC= 5.0 V 0.5 V. -8.0 mA Maximum low level output current (IOL): VCC= 2.0 V 50 A VCC= 3.3 V 0.3 V. 4.0 mA VCC= 5.0 V 0.5 V. 8.0 mA Maximum input transition rise or fall rate (t/v): VCC= 3.3 V 0.3 V. 100 ns/V VCC= 5.0 V 0.
12、5 V. 20 ns/V Operating free-air temperature range (TA). -55C to +125C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicate
13、d under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3/ The package thermal impedance
14、is calculated in accordance with JESD 51-7. 4/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 5/ All unused inputs of the
15、device must be held at VCCor GND to ensure proper device operation. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03648 REV A PAGE 4 2. APPLICABLE DOCUMENTS JEDE
16、C PUB 95 - Registered and Standard Outlines for Semiconductor Devices JESD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or on
17、line at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The un
18、it container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, cons
19、truction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic
20、diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitte
21、d without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03648 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Limits Test Symbol Conditions VCCTemperature TADevice Type Min Max Unit 2.0 V 1.9 3.0 V 2.9 IOH= -50 A 4.5 V 25
22、C, -55C to 125C 4.4 25C 2.58 IOH = -4 mA 3.0 V -55C to 125C 2.48 25C 3.94 High level output voltage VOHIOH= -8 mA 4.5 V -55C to 125C 01 3.80 V 2.0 V 0.1 3.0 V 0.1 IOL= 50 A 4.5 V 25C, -55C to 125C 0.1 25C 0.36 IOL = 4 mA 3.0 V -55C to 125C 0.5 25C 0.36 Low level output voltage VOLIOL= 8 mA 4.5 V -55
23、C to 125C 01 0.5 V 25C 0.1 Input current II VI = 5.5 V or GND 0.0 V to 5.5 V -55C to 125C 01 1.0 25C 0.25 3-state output current IOZVO= VCCor GND 5.5 V -55C to 125C 01 2.5 25C 4.0 Quiescent supply current ICCVI= VCCor GND IO= 0 A 5.5 V -55C to 125C 01 40.0 A Input capacitance CIVI= VCCor GND 5.0 V 2
24、5C 01 10 Power dissipation capacitance CpdNo load, f = 1 MHz 5.0 V 25C 01 14 TYP pF Quiet output, maximum dynamic VOLVOL(P)2/ 5.0 V 25C 01 0.8 V Quiet output, minimum dynamic VOLVOL(V)2/ 5.0 V 25C 01 -0.8 V Quiet output, minimum dynamic VOHVOH(V)2/ 5.0 V 25C 01 4.4 V High level dynamic input voltage
25、 VIH(D)2/ 5.0 V 25C 01 3.5 V Low level dynamic input voltage VIL(D)2/ CL= 50 pF 5.0 V 25C 01 1.5 V See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 1623
26、6 DWG NO. V62/03648 REV A PAGE 6 TABLE I. Electrical performance characteristics - Continued. 1/ Limits Test Symbol Conditions VCCTemperature, TADevice type Min Max Unit 25C 8.0 3.0 V and 3.6 V -55C to 125C 1.0 9.5 25C 5.5 CL= 15 pF See figure 5 4.5 V and 5.5 V -55C to 125C 01 1.0 6.5 25C 11.5 3.0 V
27、 and 3.6 V -55C to 125C 1.0 13.0 25C 7.5 Propagation delay time, A to Y tPLH, tPHLCL= 50 pF See figure 5 4.5 V and 5.5 V -55C to 125C 01 1.0 8.5 ns 25C 8.0 3.0 V and 3.6 V -55C to 125C 1.0 9.5 25C 5.1 CL= 15 pF See figure 5 4.5 V and 5.5 V -55C to 125C 01 1.0 6.0 25C 11.5 3.0 V and 3.6 V -55C to 125
28、C 1.0 13.0 25C 7.1 Propagation delay time, OE to Y tPZH, tPZLCL= 50 pF See figure 5 4.5 V and 5.5 V -55C to 125C 01 1.0 8.0 ns 25C 9.7 3.0 V and 3.6 V -55C to 125C 1.0 11.5 25C 6.8 CL= 15 pF See figure 5 4.5 V and 5.5 V -55C to 125C 01 1.0 8.0 25C 13.2 3.0 V and 3.6 V -55C to 125C 1.0 15.0 25C 8.8 P
29、ropagation delay time, OE to Y tPHZ, tPLZCL= 50 pF See figure 5 4.5 V and 5.5 V -55C to 125C 01 1.0 10.0 ns 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be teste
30、d across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ Characteristics are for surface-mount packages only. Provided by IHSNot for ResaleNo reproduction
31、or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03648 REV A PAGE 7 Case X Dimensions Millimeters Inches Millimeters Inches Symbol Min Max Min Max Symbol Min Max Min Max A - 1.20 - .047 E 4.30 4.50 .169 .177 A
32、1 0.05 0.15 .002 .006 E1 6.20 6.60 .244 .260 b 0.19 0.30 .007 .012 e 0.65 NOM .026 NOM c 0.15 NOM .006 NOM L 0.50 0.75 .020 .030 D 4.90 5.10 .193 .201 NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.15 mm. 3. Fall
33、s within JEDEC MO-153. 4. All linear dimensions are shown in millimeters (inches). Inches equivalents are given for general information only. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COL
34、UMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03648 REV A PAGE 8 Case Y Dimensions Millimeters Inches Millimeters Inches Symbol Min Max Min Max Symbol Min Max Min Max A - 1.75 - .069 E 3.81 4.00 .150 .157 A1 0.10 0.25 .004 .010 E1 5.80 6.20 .228 .244 b 0.35 0.51 .014 .020 e 1.27 NOM .050 NOM c
35、 0.20 NOM .008 NOM L 0.40 1.12 .016 .044 D 8.55 8.75 .337 .344 NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.006 inches (0.15 mm). 3. Falls within JEDEC MS-012. 4. All linear dimensions are shown in inches (mill
36、imeters). Metric equivalents are given for general information only. FIGURE 1. Case outlines - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03648 REV
37、 A PAGE 9 (each buffer) Inputs OE A Output Y L H H L L L H X X X = Immaterial Z = High impedance state FIGURE 2. Truth table. FIGURE 3. Logic diagram. Device type 01 Case outlines X, Y Terminal number Terminal symbol Terminal number Terminal symbol 1 1 OE 8 3Y 2 1A 9 3A 3 1Y 10 3 OE 4 2 OE 11 4Y 5 2
38、A 12 4A 6 2Y 13 4 OE 7 GND 14 VCCFIGURE 4. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03648 REV A PAGE 10 Notes: 1. CLincludes probe and
39、 jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses are supp
40、lied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr 3 ns, tf 3 ns. 4. The outputs are measured one at a time with one input transition per measurement. 5. For 3-state and Open Drain outputs tests: tPLH/tPHLS1 = Open tPLZ/tPZLS1 = VCCtPHZ/tPZHS1 = GND Open Drain S1 = VCCFIG
41、URE 5. Timing waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03648 REV A PAGE 11 4. VERIFICATION 4.1 Product assurance requirements. T
42、he manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5.
43、 PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ES
44、DS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested sour
45、ce(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Ma
46、rking V62/03648-01XE 01295 SN74AHC125MPWREP AHC125EP V62/03648-01YE 01295 SN74AHC125MDREP AHC125MEP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-
