欢迎来到麦多课文档分享! | 帮助中心 海量文档,免费浏览,给你所需,享你所想!
麦多课文档分享
全部分类
  • 标准规范>
  • 教学课件>
  • 考试资料>
  • 办公文档>
  • 学术论文>
  • 行业资料>
  • 易语言源码>
  • ImageVerifierCode 换一换
    首页 麦多课文档分享 > 资源分类 > PDF文档下载
    分享到微信 分享到微博 分享到QQ空间

    DLA DSCC-VID-V62 03647 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED HIGH SPEED CMOS QUADRUPLE 2-INPUT POSITIVE AND GATE MONOLITHIC SILICON.pdf

    • 资源ID:689081       资源大小:85.71KB        全文页数:11页
    • 资源格式: PDF        下载积分:10000积分
    快捷下载 游客一键下载
    账号登录下载
    微信登录下载
    二维码
    微信扫一扫登录
    下载资源需要10000积分(如需开发票,请勿充值!)
    邮箱/手机:
    温馨提示:
    如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
    如需开发票,请勿充值!如填写123,账号就是123,密码也是123。
    支付方式: 支付宝扫码支付    微信扫码支付   
    验证码:   换一换

    加入VIP,交流精品资源
     
    账号:
    密码:
    验证码:   换一换
      忘记密码?
        
    友情提示
    2、PDF文件下载后,可能会被浏览器默认打开,此种情况可以点击浏览器菜单,保存网页到桌面,就可以正常下载了。
    3、本站不支持迅雷下载,请使用电脑自带的IE浏览器,或者360浏览器、谷歌浏览器下载即可。
    4、本站资源下载后的文档和图纸-无水印,预览文档经过压缩,下载后原文更清晰。
    5、试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。

    DLA DSCC-VID-V62 03647 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED HIGH SPEED CMOS QUADRUPLE 2-INPUT POSITIVE AND GATE MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 09-03-16 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV A A A A A A A A A A A REV STATUS OF PAGES PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED B

    2、Y Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle APPROVED BY Thomas M. Hess TITLE MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, QUADRUPLE 2-INPUT POSITIVE AND GATE, MONOLITHIC SILICON SIZE A CODE IDENT. NO. 16236 D

    3、WG NO. V62/03647 YY-MM-DD 03-08-12 REV A PAGE 1 OF 11 AMSC N/A 5962-V049-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03647 REV A PAGE 2 1. SCOPE 1.1 Scope.

    4、This drawing documents the general requirements of a high performance quadruple 2-input positive AND gate microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item dr

    5、awing establishes an administrative control number for identifying the item on the engineering documentation: V62/03647 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 74AHC08-EP Quadruple

    6、2-input positive AND gate 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 14 JEDEC MO-153 Plastic small-outline Y 14 JEDEC MS-012 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other le

    7、ad finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS C

    8、OLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03647 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to +7.0 V Input voltage range (VI). -0.5 V to +7.0 V 2/ Output voltage range (VO) . -0.5 V to VCC+ 0.5 V 2/ Input clamp current (IIK) (VIVCC) 20 mA Continuous

    9、 output current (IO) (VO= 0 to VCC) 25 mA Continuous current through VCCor GND. 50 mA Package thermal impedance (JA): X package . 113C/W 3/ Y package . 86C/W 3/ Storage temperature range (TSTG). -65C to +150C 1.4 Recommended operating conditions. 4/ 5/ Supply voltage range (VCC) . 2.0 V to 5.5 V Min

    10、imum high level input voltage (VIH): VCC= 2.0 V 1.5 V VCC= 3.0 V 2.1 V VCC= 5.5 V 3.85 V Maximum low level input voltage (VIL): VCC= 2.0 V 0.5 V VCC= 3.0 V 0.9 V VCC= 5.5 V 1.65 V Input voltage range (VI). 0.0 V to 5.5 V Output voltage range (VO) . 0.0 V to VCCMaximum high level output current (IOH)

    11、: VCC= 2.0 V -50 A VCC= 3.3 V 0.3 V. -4.0 mA VCC= 5.0 V 0.5 V. -8.0 mA Maximum low level output current (IOL): VCC= 2.0 V 50 A VCC= 3.3 V 0.3 V. 4.0 mA VCC= 5.0 V 0.5 V. 8.0 mA Maximum input transition rise or fall rate (t/v): VCC= 3.3 V 0.3 V. 100 ns/V VCC= 5.0 V 0.5 V. 20 ns/V Operating free-air t

    12、emperature range (TA). -55C to +125C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating co

    13、nditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3/ The package thermal impedance is calculated in accordance with

    14、JESD 51-7. 4/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 5/ All unused inputs of the device must be held at VCCor GND

    15、to ensure proper device operation. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03647 REV A PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 - Registered and Standar

    16、d Outlines for Semiconductor Devices JESD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. R

    17、EQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with

    18、 the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension.

    19、 The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figu

    20、re 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DE

    21、FENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03647 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Limits Test Symbol Conditions VCCTemperature, TADevice type Min Max Unit 2.0 V 1.9 3.0 V 2.9 IOH= -50 A 4.5 V 25C, -55C to 125C 4.4 25C 2.58 IOH

    22、 = -4 mA 3.0 V -55C to 125C 2.48 25C 3.94 High level output voltage VOHIOH= -8 mA 4.5 V -55C to 125C 01 3.80 V 2.0 V 0.1 3.0 V 0.1 IOL= 50 A 4.5 V 25C, -55C to 125C 0.1 25C 0.36 IOL = 4 mA 3.0 V -55C to 125C 0.5 25C 0.36 Low level output voltage VOLIOL= 8 mA 4.5 V -55C to 125C 01 0.5 V 25C 01 0.1 In

    23、put current, A or B inputs IIVI= 5.5 V or GND 0.0 V to 5.5 V -55C to 125C 1.0 A 25C 01 2.0 Quiescent supply current ICCVI= VCCor GND IO= 0 A 5.5 V -55C to 125C 20.0 A Input capacitance CIVI= VCCor GND 5.0 V 25C 01 10 pF Power dissipation capacitance CpdNo load f = 1 MHz 5.0 V 25C 01 18 TYP pF Quiet

    24、output, maximum dynamic VOLVOL(P)2/ 5.0 V 25C 01 0.8 V Quiet output, minimum dynamic VOLVOL(V)2/ 5.0 V 25C 01 -0.8 V High level dynamic input voltage VIH(D)2/ 5.0 V 25C 01 3.5 V Low level dynamic input voltage VIL(D)2/ CL= 50 pF 5.0 V 25C 01 1.5 V See footnote at end of table. Provided by IHSNot for

    25、 ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03647 REV A PAGE 6 TABLE I. Electrical performance characteristics - Continued. 1/ Limits Test Symbol Conditions VCCTemperature, TADevice

    26、 type Min Max Unit 25C 8.8 3.0 V and 3.6 V -55C to 125C 1.0 10.5 25C 5.9 CL= 15 pF See figure 5 4.5 V and 5.5 V -55C to 125C 01 1.0 7.0 25C 12.3 3.0 V and 3.6 V -55C to 125C 1.0 14.0 25C 7.9 Propagation delay time, A or B to Y tPLH, tPHLCL= 50 pF See figure 5 4.5 V and 5.5 V -55C to 125C 01 1.0 9.0

    27、ns 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of s

    28、pecific parametric testing, product performance is assured by characterization and/or design. 2/ Characteristics are for surface-mount packages only. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE

    29、A CODE IDENT NO. 16236 DWG NO. V62/03647 REV A PAGE 7 Case X Dimensions Millimeters Inches Millimeters Inches Symbol Min Max Min Max Symbol Min Max Min Max A - 1.20 - .047 E 4.30 4.50 .169 .177 A1 0.05 0.15 .002 .006 E1 6.20 6.60 .244 .260 b 0.19 0.30 .007 .012 e 0.65 NOM .026 NOM c 0.15 NOM .006 NO

    30、M L 0.50 0.75 .020 .030 D 4.90 5.10 .193 .201 NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.15 mm. 3. Falls within JEDEC MO-153. 4. All linear dimensions are shown in millimeters (inches). Inches equivalents are

    31、 given for general information only. FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03647 REV A PAGE 8 Case Y Dimensions Millimeters Inch

    32、es Millimeters Inches Symbol Min Max Min Max Symbol Min Max Min Max A - 1.75 - .069 E 3.81 4.00 .150 .157 A1 0.10 0.25 .004 .010 E1 5.80 6.20 .228 .244 b 0.35 0.51 .014 .020 e 1.27 NOM .050 NOM c 0.20 NOM .008 NOM L 0.40 1.12 .016 .044 D 8.55 8.75 .337 .344 NOTES: 1. This drawing is subject to chang

    33、e without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.006 inches (0.15 mm). 3. Falls within JEDEC MS-012. 4. All linear dimensions are shown in inches (millimeters). Metric equivalents are given for general information only. FIGURE 1. Case outlines - Continued.

    34、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03647 REV A PAGE 9 (each gate) Input A B Output Y H H H L X L X L L X = Immaterial FIGURE 2. Truth table. FIGURE 3

    35、. Logic diagram. Device type 01 Case outline X, Y Terminal number Terminal symbol Terminal number Terminal symbol 1 1A 8 3Y 2 1B 9 3A 3 1Y 10 3B 4 2A 11 4Y 5 2B 12 4A 6 2Y 13 4B 7 GND 14 VCCFIGURE 4. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without l

    36、icense from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03647 REV A PAGE 10 Notes: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output contro

    37、l. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr 3 ns, tf 3 ns. 4. The outputs are measured one at a time with on

    38、e input transition per measurement. 5. For 3-state and Open Drain outputs tests: tPLH/tPHLS1 = Open tPLZ/tPZLS1 = VCCtPHZ/tPZHS1 = GND Open Drain S1 = VCCFIGURE 5. Timing waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEF

    39、ENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/03647 REV A PAGE 11 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedure

    40、s should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard

    41、commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers da

    42、ta book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued avail

    43、ability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/03647-01XE 01295 SN74AHC08MPWREP AHC08EP V62/03647-01YE 01295 SN74AHC08MDREP AHC08MEP 1/ The vendor item drawing establishes an admin

    44、istrative control number for identifying the item on the engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-


    注意事项

    本文(DLA DSCC-VID-V62 03647 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED HIGH SPEED CMOS QUADRUPLE 2-INPUT POSITIVE AND GATE MONOLITHIC SILICON.pdf)为本站会员(赵齐羽)主动上传,麦多课文档分享仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文档分享(点击联系客服),我们立即给予删除!




    关于我们 - 网站声明 - 网站地图 - 资源地图 - 友情链接 - 网站客服 - 联系我们

    copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
    备案/许可证编号:苏ICP备17064731号-1 

    收起
    展开