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    CAN CSA-ISO IEC 11573-1995 Information Technology - Telecommunications and Information Exchange between Systems - Synchronization Methods and Technical Requirements for Private Int.pdf

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    CAN CSA-ISO IEC 11573-1995 Information Technology - Telecommunications and Information Exchange between Systems - Synchronization Methods and Technical Requirements for Private Int.pdf

    1、I N T E R N AT IO N A L STANDARD ISO/IEC 11573 First edition 1994-1 2-1 5 (Reaff i r med 2004) Information technology - Telecommunications and information exchange between systems - Synchronization methods and technical requirements for Private Integrated Services Networks Technologies de Iinformati

    2、on - Telecommunications et echange din formation entre systemes - Mgthodes de s ynchronisation et exigences techniques pour les reseaux prives avec integration de services National Standard of Canada CAN/CSA-ISO/IEC-ll573-95 International Standard ISO/IEC 11573 : 1994 has been adopted, without modif

    3、ication, as CAN/CSA-ISO/IEC-115 73-95, which has been approved as a National Standard of Canada by the Standards Council of Canada. May 2995 Reference number ISO/IEC 11 573:1994(E) ISO/IEC 11573:1994(E) Contents Section 1 : General 1.1 Scope 1.2 Definitions . 1.3 Abbreviations and acronyms . 1.4 Imp

    4、act of slips . Section 2 : Technical requirements, Synchronization methods 2.1 Technical requirements . 2.1.1 Jitter and wander at the input . 2.1.1.1 CO and TO interfaces (1 44 kbits/s) . 2.1.1.2 C1 and TI interfaces (1, 544 Mbits/s) . 2.1 -1.3 C2 and T2 interfaces (2, 048 Mbits/s) . 2.1.2 Jitter a

    5、nd wander at the output 2.1.2.1 CO and TO interfaces (144 kbitsjs) . 2.1.2.3 C2 and T2 interfaces (2, 048 Mbits/s) . 2.1.4Accuracy . 2.1.5 Lock range . 2.2 Synchronization methods for PENS 2.1.2.2 C1 and T1 interfaces (1, 544 Mbits/s) . 2.1.3 Frequency deviation at the input 2.1.6 Phase discontinuit

    6、y of slave clocks 2.2.1 High level concepts . 2.2.2 Reference Clock Switching Criteria 2.2.3 Reference Restoral 2.2.4 Timing Reference Interfaces and Alarms 2.2.5 Buffers . 2.2.6 Controls . 2.2.7 Slip performance objectives 2.2.8 Strategies Section 3 : Description of the synchronization methods . 3.

    7、1 Plesiochronous operation . 3.2 Synchronization from one input 3.3 Automatic switch over with signalling 3.4 Automatic switch over without signalling . Ann exes A Choice of clock references A.1 Choice of reference from public nodes A.2 Choice of references between private nodes . A.3 Avoidance of T

    8、iming Loops B.1 Master Slave configurations (synchronization) . 6.2 master-master configuration (split timing) . B synchronization configuration Page 5 5 5 5 6 6 6 6 7 7 7 7 7 8 8 9 9 9 9 9 10 a 11 11 12 12 13 14 15 16 17 Q ISO/IEC 1994 All rights reserved. Unless otherwise specified. no part of thi

    9、s publication may be reproduced or utilized in any form or by any means. electronic or mechanical. including photocopying and microfilm. without permission in writing from the publisher . Printed in Switzerland ISO/IEC Copyright Office . Case Postale 56 CH-1211 Geneve 20 Switzerland 0 ISO/IEC ISO/IE

    10、C 11573:1994(E) C Basis of strategies C.1 Slip rate C.2 Allocation of the controlled slips C.3 Unavailability of the links C.4 Nodal solutions (2.5 Description of the five options D Synchronized Private Network Examples D.l Example with a small private network . D.2 Example with a big private networ

    11、k . 0.3 Example with two different public clock sources D.4 Example with a transit node E Slave Clock Performance Measurement Guidelines E.l Slave Clocks considerations . E.1 . 1 Ideal Operation E.1.2 Stressed Operation E.1.3 Holdover Operation . E.2 Test Configuration Guidelines E.2.1 Reference Clo

    12、ck E.2.2 Digital Reference Simulation E.2.3 Output Timing Signal Recovery . E.3 Test categories . E.3.1 Ideal Testing E.3.2 Stress Testing E.3.3 Holdover Testing F Signalling for management of synchronization F.1 Presentation F.l.l Configuration parameters F.1.2 Reactions of the node F.1.3 Reference

    13、 clock switching and restoral . F.2 Description of the states F.2.1 Initial states . F.2.2 Slave states . E2.3 Autonomous state . F.2.4 Wait states F.3 Description of the events . F.3.1 Failure of links F.3.2 Signalling information F.3.3 Time out . F.4 SDL representation of the state machine . G Bib

    14、liography . . . 18 18 19 20 21 22 22 23 23 24 24 25 25 25 25 26 26 26 26 26 27 28 28 28 28 28 28 29 29 29 29 29 29 29 29 34 . Ill ISO/IEC 11573:1994(E Q ISO/IEC Foreword IS0 (the International Organization for Standardization) and IEC (the International Electrotechnical Commission) form the speciali

    15、zed system for worldwide standardization. National bodies that are members of IS0 or IEC participate in the development of International Standards through technical committees established by the respective organization to deal with particular fields of technical activity. IS0 and IEC technical commi

    16、ttees collaborate in fields of mutual interest. Other international organizations, governmental and non-governmental, in liaison with IS0 and IEC, also take part in the work. In the field of information technology, IS0 and IEC have established a joint technical committee, ISO/IEC JTC 1. Draft Intern

    17、ational Standards adopted by the joint technical committee are circulated to national bodies for voting. Publication as an International Standard requires approval by at least 75% of the national bodies casting a vote. International Standard ISO/IEC 11573 was prepared by Joint Technical Committee IS

    18、O/IEC JTC 1, Information technology, Subcommittee SC 6, Telecommunications and information exchange between systems. During the preparation of this International Standard, information was gathered on patents upon which application of the standard might depend. Relevant patents were identified as bel

    19、onging to ALCATEL Business Systems. However, IS0 and IEC cannot give authoritative or comprehensive information about evidence, validity or scope of patent and like rights. The patent-holder has stated that licences will be granted under reasonable terms and conditions and com- munications on this s

    20、ubject should be addressed to ALCATEL Business Systems Business Products Division 54, avenue Jean Jaures 92707 Colombes Cedex France Tel. : (1) 47.85.55.55 Telex: 615.531 F Telefax: (1) 47.85.54.20 iv Q ISO/lEC ISO/IEC 11573:1994(E) Introduction When synchronous digital signals are being transported

    21、 over a communications link, the receiving end must operate at the same average frequency as the transmitting end to prevent loss of information. This is referred to as link synchronization. When digital signals traverse a network of digital communications links, switching nodes, multiplexers, and t

    22、ransmission interfaces, the task of keeping all the entities operating at the same average frequency is referred to as network synchronization. The design of a PEN requires specification of the timing sources and receivers for the synchronization network. Proper design requires that timing loops in

    23、the synchronization network be avoided. A timing loop occurs when a clock is using as its reference frequency a signal that is itself traceable to the output of that clock. The formation of such a closed timing loop leads to frequency instability and is not permitted. While it is relatively straight

    24、forward to ensure against timing loops in the primary synchronization reference network, care should be taken that timing loops do not occur during failure or error conditions when various timing references are rearranged. When a PlSN is not connected to the public digital network, synchronization c

    25、an be achieved by having all PlSN equipment derive timing from a single source.This source should be the highest quality clock available. Alternatively, if timing is derived from more than one class I clock, or public clock traceable source, the network is said to be operating plesio ch rono usly. I

    26、f a PlSN is connected to the public network at one or more nodes, the private network designer can coordinate with the public network provider to derive class I clock, or public clock traceable timing from the public digital network. More information is available in Annex A. ISO/IEC 11573:19946E) IN

    27、TERNATIONAL STANDARD 0 ISO/IEC Information technology - Telecommunications and information exchange between systems - Synchronization methods and technical requirements for Private Integrated Services Networks Section 1 : General 1.1 Scope This International Standard contains requirements necessaryf

    28、orthesynchronization of PISNs.Timing within adigital private networkneedsto becontrotled carefullytoensurethatthe rateofoccurrenceofslips between PlNXswithinthe PISN,andthe public switched networks is sufficiently low not to affect unduly the performance of voice transmissions, or the accuracy or th

    29、roughput (if errored data require re-transmission) of non -voice services. Requirements arealso based upon the interconnection of digital private telecommunication networks via digital facilities in the public (switched or not) telecommunication networks. This International Standard is one of a seri

    30、es of technical standards on telecommunications networks. This International Standard with its companion standards fills a recognized need in the telecommunications industry brought about by the increasing use of digital equipment and facilities in private networks. It is useful to anyone engaged in

    31、 the manufacture of digital customer premisesequipment(CPE)for privatenetworkapplications, andtothosepurchasing, operating or applying digital CPE to digital facilities for Private Integrated Services Networks (PISN). This International Standard establishes technical criteria necessary in the design

    32、 of a synchronization plan for a PISN. Compliance with these requirements would be expected to result in a quality PISN synchronization design. 1.2 Definitions For the purposes of this International Standard, the following definitions apply: 1.2.1 Accuracy A measure of the maximum departure from the

    33、 nominal clock rate over a 24 h period, made anytime in the lifetime of the clock, during a defined period of time, within the declared environmental conditions. Frequency deviation may be constrained to the specific accuracy by clock operation in the free running or hold over modes, as defined belo

    34、w. 1.2.2 Asynchronous signals Signals having not the same nominal rate. 1.2.3 Clock free running mode In such a mode, the PtNX works with its own clock source which is not locked to an external reference and is not using storage techniques to maintain its accuracy. 1.2.4 Clock hold over mode An oper

    35、ating condition of a clock in which it is not locked to an external reference clock, but uses storage techniques to maintain during a limited period of time its accuracy with respects to the last known reference clock. 1.2.5 Controlled Slip It consists of the repetition or deletion of an integer num

    36、ber of octets caused by the elastic buffer mechanism used at the interface of a non-synchronous bit stream (a plesiochronous or asynchronous one). Slips and controlled slips shall be considered synonymous in this International Standard. 1.2.6 Jitter Short-term non-cumulative variations of the signif

    37、icant instants of a digital signal from their ideal positions in time. 1 ISO/IEC 1 1573: 1994(E) 0 ISO/IEC 1.2.7 Lock range Maximum frequency offset from the nominal, to which a given clock is able to synchronize. 1.2.8 Master The term “master“ refers to the clock source providing the timing to the

    38、PINX. 1.2.9 Maximum time interval error (MTIE) The maximum time interval error (TIE) for all possible measurement intervals within the measurement period. Figure 1 illustrates the definition of MTIE. 1.2.1 0 Phase Locked Loop (PLL) A feedback-controlled system that locks a local clock to an incoming

    39、 reference clock in both frequency and phase. 1.2.1 1 Plesiochronous The essential chracteristicof time-scales or signals such as their corresponding significant instants occur at nominallythe same rate, any variation in rate being constrained within specified limits. 1.2.1 2 Primary Reference Clock

    40、 Equipment that provides a timing signal, with a long term accuracy equal or better than 21 O-ll. 1.2.13 Pull in range Maximum frequency offset from its own clock, to which a given clock is able to synchronize. 1.2.1 4 Reference Clock Timing signal used for synchronization, without any assumption on

    41、 its accuracy. 1.2.1 5 Slave The term “slave“ refers to the PINX receiving timing from another source. 1.2.16 Slip Refer to controlled slip 1.2.1 7 Split Timing An arrangementwhere equipment ernploysseparate transmit and receiveclocks onatransmission link having no particular relationship to one ano

    42、ther. 1.2.1 8 Synchronous Qualifiessignals with corresponding significant instants occuring atthesame mean rate; thetimedifference between these homologous instants is generally limited. 1.2.1 9 Synchronization The process of adjusting the corresponding significant instants of signals so that a cons

    43、tant phase relationship exists between them. 1.2.20 Time-Interval Error (TIE) Thevariation intimedelayofagiventirningsignal with respectto an ideal timingsignaloveraparticulartimeperiod. Figure 1 illustrates the definition of TIE. 1.2.21 Timing loop An unstable condition in which two or more equipme

    44、nt clocks transfer timing to each other, forming a loop without a designated master timing source. 1.2.22 Time to repair The time by which, with a stated probability, the link is repaired. 1.2.23 Transparent Alinkorgroupof linksistransparent ifthesignal carried is not re-timed from aclockassociated

    45、withthe link(s). Thetiming of asignal passing across atransparent link may however be altered due to jitter, wander, filtering, orfaultconditions. Figure 2 illustrates the definition of transparent and non transparent links. 1.2.24 Wander The long-term variations of the significant instants of a dig

    46、ital signal from their ideal positions in time. Long-term implies that these variations are of low frequency. 2 o ISO/IEC Time delay with respect to ideal reference in seconds ISO/IEC 11573:1994(E) term frequency departure / / / / / / / /- / / .) 1.3 Abbreviations and acronyms 4 S + AIS: BITS : ccm

    47、: CPE : co : c1: c2 : c3: DCS : DSX : DTE : ESF : FM : GPS : MTIE : MUX : NCTE : NI : PISN : PINX : PP* : PSTN : PLL : PRC : PM : SES : SDH : TO : T1: m: TIE : UI : UTC : Alarm Indication signal Building Integrated Timing Supply International Telegraph and Telephone Consultative Committee Customer P

    48、remises Equipment Basic Rate transparent or non transparent links 1,544 Mbitsls transparent or non transparent links 2,048 Mbitsls transparent or non transparent links Non ISDN transparent or non transparent links Digital Cross - connect Sys tern Digital Signal Cross-connect Data Terminal Equipment

    49、Extended Super Frame Frequency Modulation Global Positioning System Maximum Time Interval Error (see figurel) Muftiplexer Network Channel Terminating Equipment Network Interface Private Integrated Services Network. Private Integrated Services Network Exchange (PABX, Key System, .). parts per million Public Switched Telecommunication Network Phase Locked Loop Primary Reference Clock Phase Modulation Severely Errored Second Synchronous Digital Hierarchy Basic Rate Access to public ISDN 1,544 Mbits/s Access to public ISDN 2,048 Mbits/s Access to public ISDN Time Interval Error (see figurel) U


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