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    ASTM F1662-2010 Standard Test Method for Verifying the Specified Dielectric Withstand Voltage and Determining the Dielectric Breakdown Voltage of a Membrane Switch《验证膜片开关的指定介电耐受电压和.pdf

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    ASTM F1662-2010 Standard Test Method for Verifying the Specified Dielectric Withstand Voltage and Determining the Dielectric Breakdown Voltage of a Membrane Switch《验证膜片开关的指定介电耐受电压和.pdf

    1、Designation: F1662 10Standard Test Method forVerifying the Specified Dielectric Withstand Voltage andDetermining the Dielectric Breakdown Voltage of aMembrane Switch1This standard is issued under the fixed designation F1662; the number immediately following the designation indicates the year oforigi

    2、nal adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. Asuperscript epsilon () indicates an editorial change since the last revision or reapproval.1. Scope1.1 This test method covers the verification of a specifieddielectri

    3、c withstand voltage or dielectric breakdown voltage ofa membrane switch.2. Referenced Documents2.1 ASTM Standards:2F1680 Test Method for Determining Circuit Resistance of aMembrane SwitchF1663 Test Method for Determining the Capacitance of aMembrane Switch3. Terminology3.1 Definitions:3.1.1 dielectr

    4、ic withstand voltagea voltage, above ratedvoltage, applied for a specific time between mutually insulatedtest points or between an insulated test point and ground, whichresults in no visual change or specified leakage current.3.1.2 dielectric breakdown voltagethe voltage at which adisruptive dischar

    5、ge or excessive leakage current occurs.3.1.3 disruptive dischargeflashover (surface discharge),spark over (air discharge), or breakdown (puncture discharge).3.1.4 leakage currentcurrent between mutually insulatedtest points when a voltage is applied.3.1.5 membrane switcha momentary switching device

    6、inwhich at least one contact is on, or made of, a flexiblesubstrate.3.1.6 test pointstwo preselected mutually insulated loca-tions on switch assembly.4. Significance and Use4.1 Dielectric withstand voltage testing is useful for designverification, quality control of materials, and workmanship.4.2 Th

    7、is test method is used to verify that the membraneswitch can operate safely at its rated voltage, and withstandmomentary overpotentials due to switching, surges and othersimilar electrical phenomena.4.3 Specific areas of testing are, but not limited to:4.3.1 Conductor/dielectric/conductor crossing p

    8、oint,4.3.2 Close proximity of conductors, and4.3.3 Any other conductive surface such as shielding ormetal backing panel.4.4 Dielectric withstand voltage testing may be destructiveand units that have been tested should be considered unreliablefor future use.4.5 Testing using ac voltage may be useful

    9、for switchesintended for control circuits powered by ac voltages.5. Interferences5.1 The following parameters may affect the results of thistest:5.1.1 Humidity,5.1.2 Contamination, and5.1.3 Temperature.6. Apparatus6.1 Electric Device, suitable to provide a controlled dc or acvoltage, leakage current

    10、 measurement.7. Procedure7.1 Dielectric Withstand Test Method:7.1.1 Measure and record the following characteristics priorto performing test:7.1.1.1 Open and closed circuit resistance of the test pointsin accordance with Test Method F1680.7.1.1.2 Capacitance of the test point in accordance withF1663

    11、.7.1.2 Connect two test points on the switch assembly, eachto a separate polarity, on the voltage source.1This test method is under the jurisdiction of ASTM Committee F01 onElectronics and is the direct responsibility of Subcommittee F01.18 on MembraneSwitches.Current edition approved May 1, 2010. P

    12、ublished June 2010. Originallyapproved in 1995. Last previous edition approved in 2004 as F1662 - 04. DOI:10.1520/F1662-10.2For referenced ASTM standards, visit the ASTM website, www.astm.org, orcontact ASTM Customer Service at serviceastm.org. For Annual Book of ASTMStandards volume information, re

    13、fer to the standards Document Summary page onthe ASTM website.1Copyright ASTM International, 100 Barr Harbor Drive, PO Box C700, West Conshohocken, PA 19428-2959, United States.7.1.3 Select test voltage from Table 1.7.1.4 Apply the test voltage from zero to specified value asuniformly as possible, a

    14、t a rate of approximately12 of the testvoltage per second (V/s), unless otherwise specified. Forexample, Level 2 in Table 1, the ramp rate is 250 V/s for a testvoltage of 500 V dc.7.1.5 Apply test voltage to switch assembly for 60 s.7.1.6 Record visual changes or leakage current, or both, ifany.7.1.

    15、7 Dissipate all charges to ground using appropriatemethods prior to continuing test to next test voltage (repeat7.1.3 to 7.1.7 as needed).7.1.8 Repeat measurements recorded in 7.1.1.7.2 Dielectric Breakdown Method:7.2.1 Connect two test points on the switch assembly, eachto a separate polarity, on t

    16、he voltage source.7.2.2 Apply the voltage incrementally from zero to break-down as uniformly as possible, at a rate of 250 V/s unlessotherwise specified.7.2.2.1 Apply test voltage to switch assembly for 60 s ateach incremental test voltage.7.2.3 Record visual changes and magnitude of breakdownvoltag

    17、e, if any.7.2.4 Dissipate all charges to ground using appropriatemethods prior to continuing test to additional test points (repeat7.2.1 to 7.2.4).8. Report8.1 Report the following information:8.1.1 Temperature,8.1.2 Relative humidity,8.1.3 Specified dielectric withstand voltage (pass or fail),8.1.4

    18、 Circuit resistance pre and post (Dielectric WithstandTest),8.1.5 Capacitance pre and post (Dielectric Withstand Test),8.1.6 Delectric breakdown voltage,8.1.7 Actual applied voltage or failure voltage,8.1.8 Duration of applied voltage,8.1.9 Description of test equipment,8.1.10 Voltage ramp rate,8.1.

    19、11 Part number or description of switch, or both,8.1.12 Description of test points,8.1.13 Date of test,8.1.14 Description of visual change (if applicable),9. Precision and Bias9.1 PrecisionIt is not possible to specify the precision ofthe procedure in Test Method F1662 for measuring the dielec-tric

    20、withstand because inter-laboratory studies have proveninconclusive due to insufficient participating laboratories withthe appropriate equipment.9.2 BiasNo information can be presented on the bias ofthe procedure in Test Method F1662 for measuring dielectricwithstand because no standard sample is ava

    21、ilable for thisindustry.10. Keywords10.1 dielectric withstand voltage; dielectric breakdown volt-age; membrane switchASTM International takes no position respecting the validity of any patent rights asserted in connection with any item mentionedin this standard. Users of this standard are expressly

    22、advised that determination of the validity of any such patent rights, and the riskof infringement of such rights, are entirely their own responsibility.This standard is subject to revision at any time by the responsible technical committee and must be reviewed every five years andif not revised, eit

    23、her reapproved or withdrawn. Your comments are invited either for revision of this standard or for additional standardsand should be addressed to ASTM International Headquarters. Your comments will receive careful consideration at a meeting of theresponsible technical committee, which you may attend

    24、. If you feel that your comments have not received a fair hearing you shouldmake your views known to the ASTM Committee on Standards, at the address shown below.This standard is copyrighted by ASTM International, 100 Barr Harbor Drive, PO Box C700, West Conshohocken, PA 19428-2959,United States. Ind

    25、ividual reprints (single or multiple copies) of this standard may be obtained by contacting ASTM at the aboveaddress or at 610-832-9585 (phone), 610-832-9555 (fax), or serviceastm.org (e-mail); or through the ASTM website(www.astm.org). Permission rights to photocopy the standard may also be secured from the ASTM website (www.astm.org/COPYRIGHT/).TABLE 1 Test VoltageATest Voltage Ramp Rate (V/s)Level 1 250 dc 125Level 2 500 dc 250Level 3 1000 dc 500Level 4 As specified (ac or dc) As specifiedAAll dwell times at maximum voltage = 60 s.F1662 102


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