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    ANSI INCITS TR-26-2000 Information Technology Fibre Channel High Speed Parallel Interface《信息技术.光纤信道.高速并行接口》.pdf

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    ANSI INCITS TR-26-2000 Information Technology Fibre Channel High Speed Parallel Interface《信息技术.光纤信道.高速并行接口》.pdf

    1、INCITS TR-26-2000Information Technology Fibre Channel High Speed Parallel InterfaceCopyright American National Standards Institute Provided by IHS under license with ANSINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Copyright American National Standards Institute

    2、 Provided by IHS under license with ANSINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-NCITS TR-26-2000NCITS Technical ReportInformation Technology Fibre Channel High Speed Parallel InterfaceSecretariatInformation Technology Industry CouncilAbstractThis technical

    3、report defines the functions and electrical characteristics of the high-speed parallel interfacebetween the physical (FC-0) layer and the transmission protocol (FC-1) layer of a Fibre Channel port. Thisinterface operates at either 2 125,0 or 1 062,5 Mbaud. This interface has additional functions and

    4、 differentelectrical characteristics compared to the “Fibre Channel - 10-bit Interface”, previously published asX3.TR-18:1997, which operated at 1 062,5 MBaud only. This document applies in full to systems wherethe FC-0 and FC-1 layer are implemented as separate devices. For systems where the FC-0 a

    5、nd FC-1 de-vices are integrated, only the functional characteristics of this document apply.Copyright American National Standards Institute Provided by IHS under license with ANSINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-This Technical Report is one in a seri

    6、es produced by the National Committee forInformation Technology Standards (NCITS). The secretariat for NCITS is held bythe Information Technology Industry Council (ITI), 1250 Eye Street, NW, Suite 200,Washington, DC 20005.As a by-product of the standards development process and the resources ofknowl

    7、edge devoted to it, NCITS from time to time produces Technical Reports.Such Technical Reports are not standards, nor are they intended to be used assuch.NCITS Technical Reports are produced in some cases to disseminate thetechnical and logical concepts reflected in standards already published or und

    8、erdevelopment. In other cases, they derive from studies in areas where it is foundpremature to develop a standard due to a still changing technology, orinappropriate to develop a rigorous standard due to the existence of a number ofviable options, the choice of which depends on the users particular

    9、requirements.These Technical Reports, thus, provide guidelines, the use of which can result ingreater consistency and coherence of information processing systems.When the draft Technical Report is completed, the Technical Committee approvalprocess is the same as for a draft standard. Processing by N

    10、CITS is also similar tothat for a draft standard.CAUTION: The developers of this Technical Report have requested that holdersof patents that may be required for the implementation of the Technical Report,disclose such patents to the publisher. However, neither the developers nor thepublisher have un

    11、dertaken a patent search in order to identify which, if any, patentsmay apply to this Technical Report.As of the date of publication of this Technical Report and following calls for theidentification of patents that may be required for the implementation of theTechnical Report, no such claims have b

    12、een made. No further patent search isconducted by the developer or the publisher in respect to any Technical Report itprocesses. No representation is made or implied that licenses are not required toavoid infringement in the use of this Technical Report.NCITSTechnicalReportSeriesPublished byAmerican

    13、 National Standards Institute11 West 42nd Street, New York, New York 10036Copyright 2000 by Information Technology Industry Council (ITI)All rights reservedNo part of this publication may be reproduced in anyform, in an electronic retrieval system or otherwise,without prior written permission of the

    14、 publisher.Printed in the United States of AmericaPATENTSTATEMENTCopyright American National Standards Institute Provided by IHS under license with ANSINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-NCITS TR-26-200011 ScopeThis document defines the functions and e

    15、lectrical characteristics of a High-Speed Parallel Interface between FC-1(Transmission protocol layer) and FC-0 (Physical layer) devices at 2 125,0 and 1 062,5 MBaud data rates. This docu-ment applies in full to systems where the FC-0 and FC-1 layer are implemented as separate devices. For systems w

    16、herethe FC-0 and FC-1 devices are integrated, only the functional characteristics of this document apply.The High-Speed Parallel Interface is composed of two subinterfaces: Transmit Interface and Receive Interface. Figure 1shows the relationship of these interfaces.FIGURE 1 - HIGH-SPEED PARALLEL INT

    17、ERFACE DIAGRAM2 Normative referencesThe following American National Standards contain provisions which, through reference below, constitute provisionsof this Technical Report. All standards are subject to revisions, and parties to agreements based on this Technical Reportare encouraged to apply the

    18、most recent editions of the standards. Members of IEC and ISO maintain registers of cur-rently valid International Standards. ANSI performs a similar function for American National Standards.ANSI X3.230-199x, Fibre Channel Physical Interface (FC-PI)ANSI X3.230-199x, Fibre Channel Framing and Signali

    19、ng Interface (FC-FS)Data FC protocol device REFCLK0:1Serial data outSerial data in1010Physical layer (FC-0)Transmission protocol layer (FC-1)2Control22EWRAPEN_CDETTX0:9COM_DETRX0:9RBC0:1TBCTransmitReceivec55c85c68c81c86c80c76c87c87c72c85ReceiverPLLPLLInterfaceVREFTVREFRInterface2TX_RATERX_RATELoopba

    20、ckRX_LOSCopyright American National Standards Institute Provided by IHS under license with ANSINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-NCITS TR-26-200023 Definitions and conventionsThe following definitions, conventions, abbreviations, acronyms and symbols

    21、apply in addition to those in FC-PI andFC-FS.3.1 Definitions3.1.1 byte alignment: The receiver action that resets the byte boundary to the comma within the K28.5 characterbeing received.3.1.2 byte slipping: The receiver action that eliminates the 180 phase error between the receive data and the rece

    22、ivebyte clock.3.1.3 comma+: The seven bit sequence (0011111) of an encoded data stream.3.1.4 comma-: The seven bit sequence (1100000) of an encoded data stream.3.1.5 sliver: A pulse with a duration which is less than that specified for that signal (e.g. a truncated clock signal).3.1.6 word alignment

    23、: The process by which an entity determines the location of the four byte (“word”) boundary ina continuous byte stream.3.2 Editorial conventionsIn this Technical Report, a number of conditions, mechanisms, sequences, parameters, event states, or similar termsare printed with the first letter of each

    24、 word in uppercase and the rest in lowercase (e.g. Physical). Any lowercase usesof these words have the normal technical English meaning.Numbered items in this Technical Report do not represent any priority. Priority, if it exists, is explicitly indicated.The ISO convention of numbering is used. The

    25、 thousands and higher multiples are separated by a space and a commais used as the decimal point. A comparison of the American and ISO conventions are shown:ISO American0,1 0.11 234 1,2341 234 567,8 1,234,567.8In case of conflict between figures, tables, and text, the text shall take precedence. Exc

    26、eptions to this convention areindicated if appropriate.In figures, tables, and text, the most significant bit of a binary quantity is shown on the left side. Exceptions to thisconvention are indicated if appropriate.The term “shall” is used to indicate a mandatory rule. If the mandatory rule is not

    27、followed, the results are unpredict-able unless indicated otherwise.If a field or control bit in a frame is specified as not meaningful, the entity which receives the frame shall not checkthat field or control bit.Hexadecimal notation is used to represent fields. For example, a three byte D_ID field

    28、 containing a binary value of11111111 11111111 11111010 is denoted by FF FF FA.Copyright American National Standards Institute Provided by IHS under license with ANSINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-NCITS TR-26-200033.3 Abbreviations, acronyms and sy

    29、mbolsThe following abbreviations and acronyms are applicable to this Technical Report.FC Fibre ChannelPLL Phase Locked Loopppm parts per million4 Functional descriptionThe Transmit Interface is defined as an input to the Physical layer device with a 10-bit wide transmit data bus (Tx0:9),its associat

    30、ed transmit byte clock (TBC) and a speed selector (TX_RATE). The reference clock is a differential 106,25MHz 100 ppm signal (REFCLK0:1). REFCLK0:1 frequency is independent of both the Transmit Interface andReceive Interface data rates. The Transmission protocol layer device presents data to the Phys

    31、ical layer device relativeto the falling edge of TBC when the Transmit Interface is operating at 1 062,5 MBaud. The Transmission protocol layerdevice presents data to the Physical layer device synchronous with both rising and falling edges of TBC when theTransmit Interface is operating at 2 125,0 MB

    32、aud. The speed of the Transmit Interface is set by the TX_RATE signal. Atransmit reference voltage (VREFT) is provided to ensure that TBC and Tx0:9 have a well-defined threshold betweenlow and high values in order to reduce jitter.The Receive Interface is defined as an output of the Physical layer d

    33、evice with a 10-bit wide data bus (Rx0:9), tworeceive byte clocks (RBC0:1), an optional comma detection enable (EN_CDET), a comma detection indication(COM_DET) and a speed selector (RX_RATE). The receive byte clocks operate at 53,125 MHz when the ReceiveInterface data rate is 1 062,5 MBaud and at 10

    34、6,25 MHz when the Receive Interface data rate is 2 125,0 MBaud. Thereceive byte clocks are 180 out of phase with each other. Receive data is presented to the Transmission protocol layerdevice relative to the rising edge of each of RBC0 and/or RBC1. The speed of the Receive Interface is set by theRX_

    35、RATE signal. A receive reference voltage (VREFR) is provided to ensure that RBC0:1 and Rx0:9 have well-defined threshold between low and high values in order to reduce jitter.Two additional signals complete the definition of the High-Speed Parallel Interface. The first is the wrap or loopbacksignal

    36、(EWRAP). This signal is defined as an input to the Physical layer device which causes serialized transmit data tobe looped back to the auxiliary inputs of the receiver deserializer. The second is receiver loss-of-signal (RX_LOS). Thissignal indicates when the amplitude of the incoming serial data is

    37、 low enough to be considered invalid.4.1 Data flowThe 10-bit data presented to the Physical layer device shall be serially transmitted to the cable plant, bits Tx0-Tx9sequentially. The relationship of transmit bits and the 10-bit 8B/10B-encoded characters is described in FC-FS.The receiver in the Ph

    38、ysical layer device shall receive and frame data at an arbitrary byte boundary until a commasequence is received. The receiver shall realign its current byte boundary, if necessary, to that of the received comma.This process is called “byte alignment”. During the byte alignment process the Physical

    39、layer device may delete up to 4characters in order to align the receive clock and the data byte containing the comma character (byte 0). This process iscalled “byte slipping”.Copyright American National Standards Institute Provided by IHS under license with ANSINot for ResaleNo reproduction or netwo

    40、rking permitted without license from IHS-,-,-NCITS TR-26-200044.2 Electrical interface signalsThe Transmit Interface and Receive Interface signals listed below shall comprise the minimum set of signals whichmust be supplied for compliance with this Technical Report. Each signal is described in its o

    41、wn subsection which isheaded with the signal name followed by the logic family in parentheses. In case of conflict between specifications inthis document and other documents describing similarly-named logic families, this document shall take precedence.The two static reference voltage signals do not

    42、 have associated logic families. Electrical signal levels are described inSection 5.4.2.1 Tx0:9 (SSTL_2)Tx0:9 is the 10-bit parallel transmit data presented to the Physical layer device for serialization and transmissiononto the media. The order of transmission is Tx0 first, followed by Tx1 through

    43、Tx9. If the Transmit Interface isoperating at 2 125,0 MBaud, Tx0:9 shall be 212,50 MBaud. If the Transmit Interface is operating at 1 062,5MBaud, Tx0:9 shall be 106,25 MBaud.4.2.2 TBC (SSTL_2)TBC is the transmit byte clock which operates at 106,25 MHz independent of the Transmit Interface data rate.

    44、 TBC isused to read data into the Physical layer device for transmission. When the Transmit Interface is operating at 2 125,0MBaud, TBC shall be synchronous with Tx0:9 (“source-synchronous”) and data shall be read into the Physicallayer device on both edges of TBC. When the Transmit Interface is ope

    45、rating at 1 062,5 MBaud, data shall be readinto the Physical layer device on the falling edge of TBC. TBC shall be frequency locked to REFCLK0:1. Thephase relationship of TBC to REFCLK0:1 must be maintained within +/- 90 degrees and is vendor-dependent.4.2.3 REFCLK0:1 (PECL)REFCLK0:1 is the differen

    46、tial 106,25 MHz transmit PLL reference clock. The frequency tolerance for this clockshall be 100 ppm. REFCLK0:1 may be used by the transmitter PLL to generate the 2 125,0 or 1 062,5 MHz bitrate clocks used in serial data transmission. Receivers shall automatically lock to REFCLK0:1. REFCLK0:1 isacti

    47、ve on the rising edge of REFCLK1.4.2.4 TX_RATE (SSTL_2)TX_RATE is the speed selector for the Transmit Interface. When TX_RATE is set to logical 0, the Transmit Interfaceshall operate at 1 062,5 MBaud. When TX_RATE is set to logical 1, the Transmit Interface shall operate at 2 125,0MBaud.4.2.5 VREFTV

    48、REFT is the reference voltage for Tx0:9, TBC, TX_RATE, RX_RATE, EWRAP and EN_CDET. The Physicallayer device shall interpret Tx0:9, TBC, TX_RATE, RX_RATE, EWRAP and EN_CDET as logical 1 when theirvoltages are greater than VREFT. The Physical layer device shall interpret Tx0:9, TBC, TX_RATE, RX_RATE,E

    49、WRAP and EN_CDET as logical 0 when their voltages are less than VREFT. VREFT may be supplied by theTransmission protocol layer device.4.2.6 Rx0:9 (SSTL_2)Rx0:9 is the 10-bit parallel receive data presented to the Transmission protocol layer device for further processing.Data byte 0 of a four-byte receive word containing the comma character shall be byte aligned to


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