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    BS QC 790110-1992 Specification for harmonized system of quality assessment for electronic components Semiconductor devices Integrated circuits Blank detail specification Microproc.pdf

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    BS QC 790110-1992 Specification for harmonized system of quality assessment for electronic components Semiconductor devices Integrated circuits Blank detail specification Microproc.pdf

    1、BRITISH STANDARD BS QC 790110:1992 IEC 748-2-6: 1991 Specification for Harmonized system of quality assessment for electronic components Semiconductor devices Integratedcircuits Blank detail specification Microprocessor integrated circuitsBSQC 790110:1992 BSI 01-2000 ISBN 0 580 34086 4 Amendments is

    2、sued since publication Amd. No. Date CommentsBSQC 790110:1992 BSI 01-2000 i Contents Page National foreword ii Introduction 1 1 Marking and ordering information 3 2 Application related description 3 3 Specification of the function 3 4 Limiting values (absolute maximum rating system) 5 5 Operating co

    3、nditions (within the specified operating temperature range) 6 6 Electrical characteristics 6 7 Programming 8 8 Mechanical and environmental ratings, characteristics and data 8 9 Additional information (not for inspection purposes) 8 10 Screening procedure (if required) 9 11 Quality assessment proced

    4、ures 9 12 Structural similarity procedures 9 13 Test conditions and inspection requirements 9 14 Additional measurement method 14 Table I 11 Table II 12 Table III 13 Table IV 14BSQC 790110:1992 ii BSI 01-2000 National foreword This British Standard has been prepared under the direction of the Electr

    5、onic Components Standards Policy Committee, ECL/-. It is identical with IECPublication748-2-6 (QC790110) “Semiconductor devices. Integrated circuits. Part 2: Digital integrated circuits. Section6 Blank detail specification for microprocessor integrated circuits” published by the International Electr

    6、otechnical Commission (IEC) and is a harmonized specification within the IECQ system of quality assessment for electronic components. This blank detail specification is one of a series of blank detail specifications for semiconductor devices to be used with BSQC700000:1991 “Harmonized system of qual

    7、ity assessment for electronic components. Generic specification for discrete devices and integrated circuits”. A British Standard does not purport to include all the necessary provisions of a contract. Users of British Standards are responsible for their correct application. Compliance with a Britis

    8、h Standard does not of itself confer immunity from legal obligations. Cross-references International Standard a Corresponding British Standard IEC 68-2-17 BS 2011 Environmental testing Part 2.1Q:1981 Test Q. Sealing (Identical) IEC 617-12 BS 3939 Guide for graphical symbols for electrical power, tel

    9、ecommunications and electronics diagrams Part 12:1985 Binary logic elements (Identical) IEC 747-10 BS QC 700000:1991 Harmonized system of quality assessment for electronic components. Generic specification for discrete devices and integrated circuits (Identical) IEC 748-11 BS QC 790100:1991 Harmoniz

    10、ed system of quality assessment for electronic components. Semiconductor devices. Sectional specification for semiconductor integrated circuits excluding hybrid circuits (Identical) IEC 749 BS 6493 Semiconductor devices Part 3:1985 Mechanical and climatic test methods (Identical) QC 001002 BS QC 001

    11、002:1991 Rules of Procedure of the IEC Quality Assessment System for Electronic Components (IECQ) (Identical) a Undated in the text. Summary of pages This document comprises a front cover, an inside front cover, pagesi andii, pages1to14 and a back cover. This standard has been updated (see copyright

    12、 date) and may have had amendments incorporated. This will be indicated in the amendment table on the inside front cover.BSQC 790110:1992 BSI 01-2000 1 Introduction The IEC Quality Assessment System for Electronic Components is operated in accordance with the statutes of the IEC and under the author

    13、ity of the IEC. The object of this system is to define quality assessment procedures in such a manner that electronic components released by one participating country as conforming with the requirements of an applicable specification are equally acceptable in all other participating countries withou

    14、t the need for further testing. This blank detail specification is one of a series of blank detail specifications for semiconductor devices and shall be used with the following IECPublication: 747-10/QC700000, Semiconductor devices Part 10: Generic specification for discrete devices and integrated c

    15、ircuits. Required information Numbers shown in brackets on this and the following pages correspond to the following items of required information, which should be entered in the spaces provided. Identification of the detail specification 1 The name of the National Standards Organization under whose

    16、authority the detail specification is issued. 2 The IECQ number of the detail specification. 3 The numbers and issue numbers of the generic and sectional specifications. 4 The national number of the detail specification, date of issue and any further information, if required by the national system.

    17、Identification of the component 5 Main function and type numbere.g. microprocessor integrated circuit68000, etc. 6 Information on typical construction and applications. If a device is designed to satisfy several applications, this shall be stated here. Characteristics, limits and inspection requirem

    18、ents for these applications shall be met. A short description shall include the following: Number, type and length of registers. Number, type and width of buses. Word length. Addressable memory. Number of terminals. Supply voltage. Any other special feature. 7 Outline drawing, terminal identificatio

    19、n, marking and/or reference to the relevant document for outlines. 8 Category of assessed quality according to subclause2.6 of the generic specification. 9 Reference data. The clauses given in square brackets on the next pages of this standard, which form the front page of the detail specification,

    20、are intended for guidance to the specification writer and shall not be included in the detail specification. When confusion may arise as to whether a paragraph is only instruction to the writer or not, the paragraph shall be indicated between brackets.BSQC 790110:1992 2 BSI 01-2000 Name (address) of

    21、 responsible NAI (and possibly of body from which specification is available). 1 Number of IECQ detail specification, plus issue number and/or date. QC 790110-. 2 ELECTRONIC COMPONENT OF ASSESSED QUALITY IN ACCORDANCE WITH: Generic specification: Publication747-10/QC700000 Sectional specification: P

    22、ublication748-11/QC790100 and national references if different. 3 National number of detail specification. This box need not be used if national number repeats IECQ number. 4 BLANK DETAIL SPECIFICATION FOR MICROPROCESSOR INTEGRATED CIRCUITS Type number(s) of the relevant device(s). Ordering informat

    23、ion: see subclause1.2 of this standard. 5 Mechanical description Outline references: Standard package references should be given, IEC number (mandatory if available) and/or national number. Outline drawing may be transferred to or given with more details in clause8 of this standard. 7 Short descript

    24、ion Application: see clause6 of this standard. Function: see clause3 of this standard. Typical construction: Si, monolithic, bipolar, MOS. Encapsulation: cavity or non-cavity. Comparison table of characteristics for variant products. CAUTION: Electrostatic sensitive devices (if applicable). 6 Termin

    25、al identification drawing showing pin assignments, including graphical symbols. Categories of assessed quality from subclause2.6 of the generic specification. 8 Marking: letters and figures, or colour code. The detail specification shall prescribe the information to be marked on the device, if any.

    26、See subclause2.5 of generic specification and/or subclause1.1 of this standard. Reference data Reference data on the most important properties to permit comparison between types. 9 Information about manufacturers who have components qualified to this detail specification is available in the current

    27、Qualified Products List.BSQC 790110:1992 BSI 01-2000 3 1 Marking and ordering information 1.1 Marking See subclause2.5 of the generic specification. 1.1.1 Component marking 1.1.2 Shipment marking 1.2 Ordering information The following minimum information is necessary to order a specific device, unle

    28、ss otherwise specified: precise type reference (stating that the device will be supplied unprogrammed or programmed with description of acceptable pattern input media); IECQ reference of detail specification with issue number and/or date when relevant; category of assessed quality as defined in clau

    29、se9 of the sectional specification and, if required, the screening sequence as defined in clause8 of the sectional specification; any other particulars. 2 Application related description The following characteristics shall be given if they are not adequately defined in box 6. 2.1 Internal architectu

    30、re Simplified block diagram, with explanatory comments. 2.2 Hardware description The main features of operation in the system shall be indicated here. Clock requirements. 2.3 Requirements for memory organization Total number of words and total number of bits of the word addressed in each type of mem

    31、ory. This may be given in the form of a diagram (memory map). 2.4 Software main features 2.4.1 Addressing modes List of addressing modes. 2.4.2 Arithmetic and logic operations, operations on registers Number of bits involved in the operation. 2.5 External components Characteristics of external compo

    32、nents essential to the correct operation of the microprocessor shall be specified (for example clock circuitry). 3 Specification of the function 3.1 Detailed block diagram A block diagram for the microprocessor integrated circuit shall be given. It shall be sufficiently detailed to enable the indivi

    33、dual functional units within the microprocessor that are affected by the execution of the instruction to be identified, including any functional blocks that are user programmable. The main data paths, between the functional units, and the identification of their external connections, shall be shown.

    34、 The graphical symbol for the function shall be given. This may be obtained from a catalogue of standards of graphical symbols, or designed according to the rules of IEC617-12.BSQC 790110:1992 4 BSI 01-2000 3.2 Identification and function of terminals 3.2.1 Designation of the terminals The terminal

    35、shall be designated in a table as follows: with for example: Terminal name: Supply Input Output I/O Blank Non-usable. Function: three-state, open collector, totem pole. with the addition of a second table as appropriate: The different types of terminal include the following: supply terminals; input

    36、terminals/output terminals; input/output terminals (bidirectional terminals); three-state output terminals. 3.2.2 Input and output detailed functions and signals The function of each input and output signal shall be stated. The signals may be presented in the following groups: DATA signals; ADDRESS

    37、signals; CONTROL signals (including STATUS). If necessary, explanatory diagrams should be given. 3.3 Microprocessor family functional description 3.3.1 Description of registers A detailed description including number, type and size in bits of internal register(s) program addressable, or otherwise di

    38、rectly affecting the operation of the microprocessor shall be given. A schematic representation shall also be given, for example as follows: Terminal number a Terminal symbol Terminal designation Function Function of terminal (see3.2.2) Input/output identification Type of output circuit a If the sec

    39、ond table is necessary this column is deleted. Terminal symbol Package “A” pin number Package “B” pin numberBSQC 790110:1992 BSI 01-2000 5 3.3.2 Addressing modes and data types The different possible addressing modes (for example immediate, direct, relative, indexed and indirect, auto-increment/decr

    40、ement) shall be described in detail. Each description should include a schematic representation of the mechanism of the addressing mode. A list of available data types should be given. For more-complex mode a table may be necessary. 3.3.3 Instruction set The instruction format(s) shall be given, for

    41、 example, operation code field, address mode field, register definition field, operand field, etc. A comprehensive list in tabular form of the instructions which may be performed by the microprocessor shall be given. This shall give the instruction code, instruction mnemonic, the operation(s) that r

    42、esult from, and the registers that are affected by the execution of the instruction, the number of clock cycles and the number of machine cycles required and, where appropriate, the number of words forming the instruction and the addressing mode(s) associated with each instruction, including the sta

    43、tus register. Separate tables should be used for each type of instructions. These types could be for example: transfer instructions; arithmetic instructions; logic instructions; shift and rotate instructions; branch instructions; word manipulation instructions; control instructions. The bit represen

    44、tation of each instruction shall be given in accordance with the instruction format. 3.3.4 Microprogram (where appropriate) Microprogram instruction set and method of changing microprogram shall be defined. 3.3.5 External events handling 3.3.5.1 Interrupt handling The number of priority levels, type

    45、s of interrupts and interrupt processing shall be given. 3.3.5.2 Input/output handling The methods of handling the input and output of data and the output of addresses, for example, serial or parallel or multiplex combinations shall be defined. 3.3.5.3 Timer/counter (where appropriate) 3.3.6 Power s

    46、upply and initialization sequences (where appropriate) 4 Limiting values (absolute maximum rating system) See IECPublication134. (Not for inspection purposes, but for the suitable usage of the device.) These values apply over the operating temperature range, unless otherwise specified. Unless otherw

    47、ise specified, limiting values shall be given as follows: Any cautionary statement unique to an individual integrated circuit shall be included, for example, sequence of application of supply voltage. Any interdependence of limiting values shall be specified. All conditions for which the limiting va

    48、lues apply shall be stated. If transient overloads are permitted, their magnitude and duration shall be specified. For programmable devices (for example, those containing EPROM) the limiting values specific to the programming mode shall also be specified. Power supplies sequencing; microprocessor in

    49、itialization procedure.BSQC 790110:1992 6 BSI 01-2000 All voltages are referenced to a designated reference terminal. 5 Operating conditions (within the specified operating temperature range) These conditions are not to be inspected but may be used for quality assessment purposes. 6 Electrical characteristics The characteristics shall apply over the full operating tem


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