1、ICS 31. 200 L 55 :=:. t:.:. J:.:.:.:_ :.司.I: r:-亏-t,: 凰-.t，:.，_-二二、，: .，.，:;、-.r:._r:飞_;:.1 w监:眩，既.百.温，唱唱.ti三二-中华人民共和国国家标准2012-12-31发布GB/T 20296-2012月ECTR 61352 :2006 代替GB/T20296-2006 集成电路记忆法与符号Mnemonics and symbols for integrated circuits (IEC TR 61352:2006 ,IDT) 2013-07-01实施、中华人民共和国国家质量监督检验检疫总局砸世句
2、。产中国国家标准化管理委员会a叩GB/T 20296-20 12/IEC TR 61352:2006 目次前言.皿1 范围.2 规范性引用文件-3 功能记忆法和符号4 与输人和输出相关的记忆法和限定符号I GB/T 20296-2012月ECTR 61352:2006 前昌本标准按照GB/T1.1-2009给出的规则起草。本标准代替GB/T20296-2006(集成电路记忆法与符号儿本标准与GB/T20296-2006相比主要变化如下z一一全文中符号编号的表述改为新版GB/T4728的表述方式z一一增加了第2章规范性引用文件z一一将正文中GB/T4728. 13改为E模拟，GB/T4728.
3、12改为z二进制逻辑z一一将IEC821改为:IEC60821; 将CCITT改为:ITU-T，一在第3章的限定符号X叫却/Y说明中删除了二进制逻辑，限定符号川、川、三、XY及第4章中标记H的说明里将模拟二字去掉。本标准等同采用IECTR 61352:2006(集成电路记忆法与符号。本标准对IECTR 61352:2006n/2 !G ! G! & 1 1 1f 2k 2k+1 =1 =m ADC ALU ART ASCII BAM BAUDOT BBUC BCD BCR BCRC BIM BIN BTC CAMm1Xm2 2 W/G说明W 加法器(Adder)W 滞后元件(Elementwi
4、th hysteresis) G 灰盒子(Graybox) W 可再触发单稳单元(Monostable element, retriggerable) G 微型计算机、微控制器(见MUC)(Microcomputer;micro controller)(see MUC) G 微处理器见MUP)(Micro processor) (see MUP) W 乘法器(Multiplier)W 模拟z棋分器(Analogue:integrator) W 模拟z微分器(Analogue:diff町entiator)W 频率-相位比较器(Frequency-phasecomparator) W相位比较器(P
5、hasecomparator) W或元件(ORelement) W 逻辑阔值元件(Logicthreshold element) W 多数元件(Majorityelement) W 同步启动非稳态元件CAstableelement, synchronouslstarting) W 同步启动、完成最后一个脉冲后停止的非稳元件(Astah1eelement, synchro-nously starting, stopping aftcr completing the last pulse) W 与元件(ANDe!ement) W 缓冲器(元专门放大的)Buffer (without special
6、 amplification) W 非重复触发单稳元件(Monostableelement, non-retriggerable) W 偶数元件(EVENelement) W 奇数元件(ODDele01ent) W 逻辑恒等元件(Logicidentity eletnent) W 异或元件(ExclusiveOR element) W、等于m元件(mand only皿elemcnt)W 模拟/数字转换器(推荐用n/ # ) Analogue-to-dighal converter (n / # is preferred) W 算术逻辑单元(Arithmeticlogic unit) W 异步接
7、收/发射器(Asynchronousrecefvet 1 tran吵阳r)W 美国信息交换标准代码(Americanstandard. code for information inter-change) G 总线仲裁模块(Busarbitration module) W 博多码(Baudotcode) G 备份电池控制器(Batteryback-up controller) W 二进制编码的十进制(Binarycoded decimaD G 条形码阅读器z成批卡阅读器(Barcode reader; batch-card reader) G 条形码阅读器控制器z成批卡阅读控制器(Bar-co
8、dereader controller; batch-card reader controller) G 总线中断模块(Businterrupter module) W 二进制(Binary)G 总线流量控制器(Bustraffic controller) W 内容可寻址存储器(Content-addressablememory) 限定符号W/G CCO G CCD G CHG G CIA G CIRG G CLKGEN G mCMPL w CODEC G COMP w CPG w CPROC G CPT G CPU G CRC G CRG G CRTC G CTRDIVm w CTRm w
9、DAC W DEC w DENC G DESU G DLC G DMAC G DMAI G DPRAM G DPY W DRAMmlXm2 G DRAMC G DRG G DTMF G DSP G DSRGm G DX w EBCDIC w EDCU G GB/T 20296-2012月ECTR 61352:2006 说明电流控制振荡器(Current-controlledoscil1ator) 电荷搞合器(Charge-coupleddevice) 字符发生器(Charactergenerator) (高级通信接口适配器(Advanced)Communication interface Ad
10、apter 循环寄存器(Circulatingregister) 时钟发生器(Clockgenerator) m-补码，如:2CMPL= 2的补码(m-Complement，e. g. , 2CMPL = two s complement) 编码/解码器(Coder/decoder) 幅值比较器(Magnitudecomparator) 先行进位发生器(进位，传播和生成)Look ahead c盯rygenerator (carry. propagate and generate) 协处理器(Co-processor)计算机(Computer)中央处理单元(Centralprocessing
11、unit) 循环冗余校验器(Cyclic-redundancychecker) 控制寄存器(Controlregister) 阴极射线管控制器(Cathode-raytube controller) 计数器循环长度m)Counter(cycle length m) 计数器(循环长度2m)Counter(cycle length 俨)数字/模拟转换器(推荐用#/ n ) Digital: to-analogue convertor (# / n is preferred) 十进制(Decimal，1-of-l0)数据加密转换器(Data-encryptionconvertor) 数据加密标准单元
12、(在DES算法之后)Data-encryption-standard unit( fol lowing DES algorithm) (高级数据链接控制器(Advancedor high leveD data-link Controller 直接存储器访问控制器(Direct-memory-accesscontroller) 直接存储器访问接口(Direct-memory-accessinterface) 双端随机存取存储器(Dual-portrandom-access memory) 显示元件(Displayelement) 动态随机存取存储器(Dynamicrandom-access me
13、mory) 动态RAM控制器(Dynamic-RAMcontroller) 数据寄存器(Dataregister) 双音多频器件(Dualtone multi frequency device) 数字信号处理器(Digitalsignal processor) 动态移位寄存器(Dynamicshift register) 多路输出选择器(Demultiplexer)扩展二进制编码的)十进制信息代码(Extendedbinary coded decimal in formation code) 错误检测与校正单元(Errordetection and correction unit) 3 GB/
14、T 20296-20 12/IEC TR 61352:2006 限定符号W/G说明EEPROMm1 X m2 G 电可擦除可编程只读存储器(Electricallyerasable programmable read-only memory) EPLD EEPLD EPROMm1Xm2 EXP EX3 EX3GR fCOMP FDC FIFOm1Xm2 FLL FPCP FPGA FPLA FPP FRAM FSK f/U f/V G GPIB G! HDC HEX HPIB HPRI 1=0 1=1 IEC IEEE INTGEN ISDN ISO-7 ISO-8 4 G G G w w G
15、 w G w G G G G G G G w w w G W G w G w w w G G G G G G 可擦除可编程逻辑器件(Erasableprogrammable logic device) 电可擦除可编程逻辑器件(Electricallyerasable programmable logic device) 可擦除可编程只读存储器(Erasableprogrammable read-only memory) 模拟z指数函数(Analogue:Exponential function) 余3码(Excess3) 余3格雷码(Excess3 Gray) 频率比较器(Frequencyc
16、omparator) 软盘控制器(Floppy-diskcontroller) 先进先出存储器(First-infirst-out memory) 频率锁定回路元件(Frequency-locked loop element) 浮点协处理器(Floating-pointco-processor) 场可编程门阵列(推荐用PLD)Field-programmable gate array (preferred: PLD) 场可编程逻辑阵列(推荐用PLD)Field-programmable logic array (p四ferred:PLD) 浮点处理器(Floating-pointprocess
17、or) 铁电随机访问存储器(Ferro-electricalrandom-access memory) 频率移位键元件(Frequency-shiftkeying element) 模拟z频率-电压转换器(Analogue:Frequency吁to-Voltage convertor) 模拟z颜率-电压转换器(Analogue:Frequency-to-V oltage convertor) 发生器、振荡器、非稳单元(Generator，oscillator, astable element) 通用接口总线元件(Generalpurpose interface bus element) 完成最
18、后一个脉冲后停止的非稳元件(Generalpurpose interface bus element completing the last pulse) 硬盘控制器(Hard-diskcontroller) 十六进制(Hexadecimal，1of 16) 惠普仪器总线协议(HewlettPackard Instrument bus protocol) 最高优先级编码器(Highest-priority，highest priority Encoder) 电源打开时，内部0态的双稳元件(Bistableelement with internal O-state at power on) 电源
19、打开时，内部1态的双稳元件(Bistableelement with interna11-state at power on) IEC协议(IECprotocol) IEEE协议。EEEprotocol) 中断发生器(Interruptgenerator) 综合业务数字网协议如与C:控制器组合)Integrated Service Digital Net work protocol (in combinations with,e. g. ,C:controller) ISO七位码(IS07-bit code) ISO八位码(IS08-bit code) GB/T 20296-2012月ECTR
20、 61352:2006 限定符号W/G说明LANC G 局域网控制器(Localarea network controller) LIFOmlXm2 G 后进先出存储器(Last-infirst-out memory) Log w 模拟E对数画数(Analogue:Logarithmic function) MANCH G 曼彻斯特代码(Manchestercode) MARG G 存储地址寄存器(Memoryaddress register) MCRG G 微码寄存器(Microcoderegister) MDC G 多磁盘控制器(Multiple-diskcontroller) MDX w
21、 多路转换/多路信号分离器(Multiplexer/demultiplexer) MFP G 多功能外部元件(Multi-functionperipheral element) MMU G 存储器管理单元(Memorymanagement unit) MODEM G 调制解调器(Modulator/ demodulator) MPCC G 多协议通讯控制器(Multi-protocolcommunication controller) MPU G 主处理单元微处理单元用P)Main processing unit (for micro processing unit useP MUC G 微型
22、计算机推荐用zC)Micro computer (preferred: /LC) MUP G 微处理单元推荐用z的Micro-processor(preferred:P) MUX w 多路转换器(数字)Multiplexer (digitaD NAC G 网络结构控制器(Networkarchitecture controller) NVRAM w 非易失RAM(Non-volatile RAM) OCT w 八进制(Octal，lof 8) OTP G 可一次编程作为前缀)One-timeprogrammable (as a prefix) OTPROM G 可一次编程ROM(One-tim
23、e programmable ROM) P-Q w 二进制逻辑z减法器数字)Binary logic: Subtractor (digital only) PCI G 可编程通讯接口(Programmablecommunication interface) PG G 多项式发生器(Polynomialgenerator) PGA G 可编程门阵列(推荐用PLD)Programmable gate array (preferred: PLD) PGC G 多项式发生器和检查器(Polynomialgenerator and checker) PIO G 并行1/0元件(Parallel1/0el
24、ement) PIPOm G 并行进并行出寄存器(Parallel-inparallel-out register) PIPOmlXm2 G 并行进并行出储存器(Parallel-inparallel-out memory) PISOm G 并行进串行出寄存器(Parallel-inserial-out register) PISOmlXm2 G 并行进串行出存储器(Parallel-inserial-out memory) PIT G 可编程相隔定时器(Programmableinterval timer) PLA G 可编程逻辑阵列(推荐用:PLD)Programmablelogic ar
25、ray (preferred:PLD) PLD G 可编程逻辑器件(Programmablelogic device) PLL G 锁相环元件/单元(Phase-lockedloop element/ unit) PPI G 可编程外部设备接口(Programmableperipherical interface) PRI G 优先编码器(Priorityencoder) PROC G 处理器(Processor)PROMmlXm2 w 可编程只读存储器(Programmableread-only memory) PSK G 相位移位键人元件/单元(Phase-shiftkeying elem
26、ent/ unit) 5 GB/T 20296-2012/IEC TR 61352:2006 限定符号PSRAM RAMmlXm2 REG ROMmlXm2 RS232 RS366 RS422 RS423 RTCLK RTX RX SAR SCC SCSl mSEG SEL SH SIO SIPOm SIPOmlXm2 SISOm SISOmlXm2 SLAC SLIC SRGm SSIO STRG SYNC TIMER TRX TX UART U/f USART USCC 6 W/G G w G w G G G G G G G G G G w G w G G G G G G G w G G
27、G G G G G w G G 说明伪静态随机访问存储器(Pseudo-staticrandom-access memory) 随机访问存储器默认E静态)Random-access memory (by default: static) 寄存器组合中推荐用:RG)Register(in combinations preferred:RG) 只读存储器(Read-onlymemory) RS232协议(RS232protocol) RS366协议(RS366protocol) RS422协议(RS422protocol) RS423协议(RS423protocol) 实时时钟(Real-time
28、clock) 接收/发射器CReceiver / transmi tter ) 接收器CReceiver)逐次近似寄存器CSuccessiveapproximation register) 串行通信控制器CSerialcommunication controller) 小型计算机系统接口控制器CSmallcomputer system interface controller) m-段编码，如:7SEG=7-段编码Cm-Segmentcode, e. g. 7SEG = 7-segment code) 选择器(推荐用:MUX) Selector (preferred: MUX) 采样和保持元件
29、(Sample-and-holdelement) 串行1/0元件(Seriall/Oelement) 串行进并行出寄存器(Serial-inparallel-out register) 串行进并行出存储器(Serial-inparallel-out memory) 串行进串行出寄存器(Serial-inserial-out register) 串行进串行出存储器(Serial-inserial-out memory) 用户线音频处理电路CSubscriber-lineaudioprocessing circuit) 用户线接口电路(Subscriber-lineinterface circui
30、t) 移位寄存器CShiftregister) 同步串行1/0元件CSynchronousserial 1/0 element) 状态寄存器CStatusregister) 同步器z同步(作前缀时用:S，如:SDLC, SSI0) Synchronizer; synchronous (as a prefix:S, e. g. ,SDLC,SSIO) 定时器CTimer)收发器F发射器+接收器z异频雷达收发机(Transceiver;transmitter + re ceiver; Transponder) 发射器(Transmitter)通用异步接收/发射器(推荐用:S10) Universa
31、l asynchronous receiver/ transmitter (preferred: S10) 模拟z电压频率转换器(Analogue:Voltage-to-frequency convertor) 通用同步/异步接收/发射器(推荐用:S10) Universal sync/ async receiver/ transmitter (preferred:Sl0) 通用串行通信控制器推荐用:SCC) Universal serial communication con troller C preferred: SCC) . 限定符号USRT V.24 VCO VDG VFC VFO
32、VRAM VSP V/f WORM X.21 X.25 X+Y X-Y X Y X/Y或X/YXO XTCO XY W/G G G G G G G G G w G G G w w w w G G w GB/T 20296-2012月ECTR 61352:2006 说明通用同步接收/发射器(推荐用:SSI0) Universal synchronous receiver/ transmitter(preferred: SSI0) V.24协议模拟为V.28等)Follows V. 24 protocol (analogous for V. 28 etc. ) 电压控制振荡器(Voltage-co
33、ntrolledoscillator) 视频显示发生器(Videodisplay generator) 电压频率转换器(推荐用V/f)Voltage-to-frequencyconvertor (V/f is pre ferred) 变频振荡器(Variable-frequencyosci1lator) 视频RAM(Video RAM) 视频信号处理器(Videosignal processor) 电压频率转换器(Voltage-to-frequency convertor) 一次写，多次读(Writeonce, read many times) X.21协议(X21protocol) X.2
34、5协议(X25protocol) 加法器(模拟信号)Adder (analogue only) 减法器(模拟信号)Subtractor (analogue only) 除法器模拟信号)Divider (analogue only) 信号转换器，电平转换器或代码转换器(数字信号)Signal converter, level converter or code converter (digital) 晶体振荡器(Crystaloscillator) 晶体温度控制振荡器(Crystaltemperature-controlled oscillator- 乘法器模拟信号)Multiplier (an
35、alogue) 4 与输入和输出相关的记忆法和限定符号为区别输入和输出，终端功能的标记后面可跟I或0，如，CAS1:级联输人;CASO:级联输出。当终端交替用作输入和输出时用1/0，如:BUS1/0为总线输入和输出。标记符号W/G说明一mw -m w w ? w 1 w +m w -m w L: CY G L: EV G L: ODD G *REF w 移位输入，从左到右或从上到下(Shiftinginput, left to right or top to bottom) 移位输入，从右到左或从下到上(Shiftinginput,right to left or bottom to top)
36、 相关存储器比较输出(Compareoutput of associative memory) 相关存储器查询输入(Queryinput of associative memory) 固定模式输入(Fixed-modeinput) 向上计数输入(Counting-upinput) 向下计数输入(Counting-downinput) 进位总和(Sumcarry) 偶数总和(Sumeven) 奇数总和(Sumodd) 基准输人或输出，由基准量符号如U.l.f代替(Referenceinput or output; *阳be replaced by the symbol for the refer
37、ence quantity, e. g. U. 1, 7 说明受调幅输入决定的输入或输出(lnputor output aHected by an Am- Input) 调节终端:A*由A01代替，或川由下面的指示之一代替:B, CL, f , H , m , OFS, P , SR, SYM, T , U , V , WF, Z, cp或札(Adjustmentterminal; A * to be replaced by A01 ,or * to be replaced by one of the following indications:B, CL, f , H , m , OFS,P
38、 ,SR,SYM, T , U , V , WF ，Z，cp或科二进制逻辑z地址输入与地址相关)Binary logic: Address input (with AD ORESS dependency) 模拟z增益调节(这里m不应被代替)Analogue: Gain adjust (here the m should not be replaced) 模拟E调节相位(Analogue:Adjustphase) 模拟z调节偏差(Analogue:Adjustbias) /交流电源电压(a.c. supply voltage) 接受F被接受(Accept;accepted)寻址命令组(Addre
39、ssedcommand group) 确认收到(Acknowledge)模拟:调节电流限制CAnalogue:Adjust current limit) 接收器准备完毕状态(Acceptor-readystate) 激励(Activate)地址和数据CAddressand data) 模拟:调节衰减(Analogue:Adjustattenuation) 模拟:调节CAnalogue:Acijust) 地址(Address)接收数据状态CAccept-datastate) 模拟z调节频率CAnalogue: Adj ust freq uency) 访问同意CAccessgranted) 模拟z
40、调节滞后(AnalogueI Adjust hysteresis) 接收器信息交换(Acceptorhandshake) 接收器空闲状态(Acceptor-idlestate) 地址锁存器(Address-latch) 地址镇存启动(A副f归于latchenab1e) 报警禁止CAlarmInhibit) 报警启动(Alarmenable) 模拟(Analogue)接收器非准备状态(Acceptor-not-readystate) 模拟z调节偏移(Analogue:Adj ust oHset) 模拟z调节功率(Analogue:Adjustpower) 肯定轮询响应状态(AHirmativep
41、oll response state) 异步准备(Asynchronousready) 地址寄存器(Addressregister) 访问请求(Accessrequest) 斜率调节(Slopeadjustment) 模拟z调节斜率(Analogue:Adjustslew rate) 地址选通脉冲(Addressstrobe) 、 、 GB/T 20296-20 12/IEC TR 61352:2006 W/G w w w w w w w G G G G G 标记符号A ACC ACG ACL ACRS ACT ACK Am Acp AB AC A* GGWWG w w w w G w G G
42、 G G G G G G G G G G G G AO AdB AOJ AOR AGR ALME ARQ ASL ASR ASTR SY EDG PPRR AAAA ANA ANRS AOFS ALC ALE AOS Af ALI AH AIS G 8 GB/T 20296-2012/IEC TR 61352: 2006 标记符号W/G说明ASYM w 模拟z调节对称(Analogue:Adjustsymmetry) ASYN G 异步(Asynchronously)AT w 模拟z调节温度(Analogue:Adj ust temperature) ATTN G 引起注意信号(Attenti
43、on)AU w 模拟E调节电压(Analogue:Adjustvoltage) AV G 可用(Available)w 模拟z调节电压(如果混淆，推荐用AU)Analogue: Adjust voltage (if confu-sing ,A U is preferred) J AVMA G 前置早期)VMA信号Advanced(early) VMA signalJ AWF w 模拟=调节波形(Analogue:Adj ust waveform) AWNS G 接收器等待新循环状态(Acceptor-wait-for-new-cyclestate) AX G 地址，X坐标(Address，x-
44、coordinate) AY G 地址，Y坐标(Address，y-coordinate) AZ w 模拟z调节阻抗(Analogue:Adjust impedance) BACK G 总线确认(lEC6082 1) Bus acknowledge (lEC 60821) J BAL G 平衡(Balance)BAV G 总线可用(Busavailable) BCL G 总线清零(Busclear) BCR G 缓冲计数器复位(Buffercounter reset) BCSEL G 缓冲器芯片选择(Bufferchip select) BDA G 总线数据地址(Busdata address
45、) BEN G 总线启动(Busenable) BFE G 缓冲器启动(Bufferenable) BG w 借位发生输入或输出(Borrow-generateinput or output) BGACK G 总线准许确认(IEC6082 1) Bus grant acknowledge (lEC 6082 1) J BGRQ G 总线准许请求(lEC60821) Bus grant request (lEC 821)J BI w 借位输入(Borrow-ininput) BIACK G 总线中断确认(IEC6082 1) Bus interrupt acknowledge (IEC 6082
46、 1) J BIAS w 偏差(Bias)BIRQ G 总线中断请求(lEC6082 1) Bus interrupt request (lEC 6082 1) J BIP G 双极(Bipolar)BIT G 位(二进制数字)Bit (Binary digit) J BLNK G 空(Blank，blanking) BLK G 信息块(Block)BO w 借位输出(Borrow-outoutput) BOFS G 双极偏移(Bipolaroffset) BP w 借位传播输入或输出(Borrow-propagateinput or output) BR G 转移指令(Branch)BRC
47、G 波特率时钟(Baudrate clock) BRDG G 桥(Bridge)BRP G 总线回复(Busreply) BRQ G 总线请求(lEC60821)Bus request (lEC 6082 1)J BRY G 缓冲器准备(Bufferready) 9 GB/T 20296-2012月ECTR 61352:2006 标记符号BS BST BSYN BUF BUS BUSY BYTE BY BYAV BYP BYSEL Cm CACS CADS CAR CAS CASC CASCFB CAWS CC CD CDSEL CE Cf (x) L GHmmmIEmmmmuuz皿CCCCC
48、CCCCCCCCCCC 10 G WGGGGGGGGGGGWGGGGGGGGGGG w WGGGGWGGGWGGGGGG 说明引导程序(Bootstrap)总线状态(Busstatus) 总线同步(Bussynchronize) 缓冲器(Buffer)总线(Bus)元空闲(Busy)宇节(Byte)字节(仅用于组合中)Byte(in combinations only)J 可用字节(ByteaVilable) 旁路(Bya:ss)字节选择。如eselect) 控制输人(侮与控制聊相关兀Contr忧饷叫roli即n呻pu川t(w讪由CoNt奴RROO叽Ld忡e叩pend叫den叫l控制器激活状态(Controller-activesta时te) 控制器寻址确定状态(Controller-addressedstate) 、进位(组合中也用:C) Carry (in combination also: C) T 、列地址选通(
