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    IEEE 1076 4-2004 en Behavioural languages Part 5 VITAL ASIC (application specific integrated circuit) modeling specification (IEEE Computer Society Document)《行为.pdf

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    IEEE 1076 4-2004 en Behavioural languages Part 5 VITAL ASIC (application specific integrated circuit) modeling specification (IEEE Computer Society Document)《行为.pdf

    1、 INTERNATIONALSTANDARD IEC61691-5First edition2004-10IEEE 1076.4Behavioural languages Part 5: VITAL ASIC (application specific integrated circuit) modeling specification Reference number IEC 61691-5(E):2004 IEEE Std. 1076.4(E):2000 Publication numbering As from 1 January 1997 all IEC publications ar

    2、e issued with a designation in the 60000 series. For example, IEC 34-1 is now referred to as IEC 60034-1. Consolidated editions The IEC is now publishing consolidated versions of its publications. For example, edition numbers 1.0, 1.1 and 1.2 refer, respectively, to the base publication, the base pu

    3、blication incorporating amendment 1 and the base publication incorporating amendments 1 and 2. Further information on IEC publications The technical content of IEC publications is kept under constant review by the IEC, thus ensuring that the content reflects current technology. Information relating

    4、to this publication, including its validity, is available in the IEC Catalogue of publications (see below) in addition to new editions, amendments and corrigenda. Information on the subjects under consideration and work in progress undertaken by the technical committee which has prepared this public

    5、ation, as well as the list of publications issued, is also available from the following: IEC Web Site (www.iec.ch) Catalogue of IEC publications The on-line catalogue on the IEC web site (www.iec.ch/searchpub) enables you to search by a variety of criteria including text searches, technical committe

    6、es and date of publication. On-line information is also available on recently issued publications, withdrawn and replaced publications, as well as corrigenda. IEC Just Published This summary of recently issued publications (www.iec.ch/online_news/ justpub) is also available by email. Please contact

    7、the Customer Service Centre (see below) for further information. Customer Service Centre If you have any questions regarding this publication or need further assistance, please contact the Customer Service Centre: Email: custserviec.ch Tel: +41 22 919 02 11 Fax: +41 22 919 03 00 Behavioural language

    8、s Part 5: VITAL ASIC (application specific integrated circuit) modeling specification INTERNATIONALSTANDARD IEC61691-5First edition2004-10IEEE 1076.4Commission Electrotechnique InternationaleInternational Electrotechnical Commission Copyright IEEE 2004 All rights reserved IEEE is a registered tradem

    9、ark in the U.S. Patent any IEC National Committee interested in the subject dealt with may participate in this preparatory work. International, governmental and non-governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely with the International

    10、Organization for Standardization (ISO) in accordance with conditions determined by agreement between the two organizations. 2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international consensus of opinion on the relevant subjects since each tech

    11、nical committee has representation from all interested IEC National Committees. 3) IEC Publications have the form of recommendations for international use and are accepted by IEC National Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC Publ

    12、ications is accurate, IEC cannot be held responsible for the way in which they are used or for any misinterpretation by any end user. 4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications transparently to the maximum extent possible in their nat

    13、ional and regional publications. Any divergence between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter. 5) IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any equipment declared to

    14、be in conformity with an IEC Publication. 6) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent rights. IEC shall not be held responsible for identifying any or all such patent rights. International Standard IEC/IEEE 61691-5 has been

    15、processed through IEC technical committee 93: Design automation. The text of this standard is based on the following documents: IEEE Std FDIS Report on voting 1076.4 (2000) 93/194/FDIS 93/199/RVD Full information on the voting for the approval of this standard can be found in the report on voting in

    16、dicated in the above table. This publication has been drafted in accordance with the ISO/IEC Directives. The committee has decided that the contents of this publication will remain unchanged until 2005. 4 IEC 61691-5:2004(E)IEEE 1076.4-2000(E)Published by IEC under licence from IEEE. 2004 IEEE. All

    17、rights reserved. IEC 61691 consists of the following parts, under the general title Behavioural languages: IEC/IEEE 61691-1-1, Part 1: VHDL language reference manual IEC 61691-2, Part 2: VHDL multilogic system for model interoperability IEC 61691-3-1, Part 3-1: Analog description in VHDL (under cons

    18、ideration) IEC 61691-3-2, Part 3-2: Mathematical operation in VHDL IEC 61691-3-3, Part 3-3: Synthesis in VHDL IEC 61691-3-4, Part 3-4: Timing expressions in VHDL (under consideration) IEC 61691-3-5, Part 3-5: Library utilities in VHDL (under consideration) IEC/IEEE 61691-4, Part 4: Verilog hardware

    19、description language IEC/IEEE 61691-5, Part 5: VITAL ASIC (application specific integrated circuit) modeling specification 5IEC 61691-5:2004(E)IEEE 1076.4-2000(E)Published by IEC under licence from IEEE. 2004 IEEE. All rights reserved. IEC/IEEE Dual Logo International Standards This Dual Logo Intern

    20、ational Standard is the result of an agreement between the IEC and the Institute of Electrical and Electronics Engineers, Inc. (IEEE). The original IEEE Standard was submitted to the IEC for consideration under the agreement, and the resulting IEC/IEEE Dual Logo International Standard has been publi

    21、shed in accordance with the ISO/IEC Directives. IEEE Standards documents are developed within the IEEE Societies and the Standards Coordinating Committees of the IEEE Standards Association (IEEE-SA) Standards Board. The IEEE develops its standards through a consensus development process, approved by

    22、 the American National Standards Institute, which brings together volunteers representing varied viewpoints and interests to achieve the final product. Volunteers are not necessarily members of the Institute and serve without compensation. While the IEEE administers the process and establishes rules

    23、 to promote fairness in the consensus development process, the IEEE does not independently evaluate, test, or verify the accuracy of any of the information contained in its standards. Use of an IEC/IEEE Dual Logo International Standard is wholly voluntary. The IEC and IEEE disclaim liability for any

    24、 personal injury, property or other damage, of any nature whatsoever, whether special, indirect, consequential, or compensatory, directly or indirectly resulting from the publication, use of, or reliance upon this, or any other IEC or IEEE Standard document. The IEC and IEEE do not warrant or repres

    25、ent the accuracy or content of the material contained herein, and expressly disclaim any express or implied warranty, including any implied warranty of merchantability or fitness for a specific purpose, or that the use of the material contained herein is free from patent infringement. IEC/IEEE Dual

    26、Logo International Standards documents are supplied “AS IS”. The existence of an IEC/IEEE Dual Logo International Standard does not imply that there are no other ways to produce, test, measure, purchase, market, or provide other goods and services related to the scope of the IEC/IEEE Dual Logo Inter

    27、national Standard. Furthermore, the viewpoint expressed at the time a standard is approved and issued is subject to change brought about through developments in the state of the art and comments received from users of the standard. Every IEEE Standard is subjected to review at least every five years

    28、 for revision or reaffirmation. When a document is more than five years old and has not been reaffirmed, it is reasonable to conclude that its contents, although still of some value, do not wholly reflect the present state of the art. Users are cautioned to check to determine that they have the late

    29、st edition of any IEEE Standard. In publishing and making this document available, the IEC and IEEE are not suggesting or rendering professional or other services for, or on behalf of, any person or entity. Neither the IEC nor IEEE is undertaking to perform any duty owed by any other person or entit

    30、y to another. Any person utilizing this, and any other IEC/IEEE Dual Logo International Standards or IEEE Standards document, should rely upon the advice of a competent professional in determining the exercise of reasonable care in any given circumstances. Interpretations Occasionally questions may

    31、arise regarding the meaning of portions of standards as they relate to specific applications. When the need for interpretations is brought to the attention of IEEE, the Institute will initiate action to prepare appropriate responses. Since IEEE Standards represent a consensus of concerned interests,

    32、 it is important to ensure that any interpretation has also received the concurrence of a balance of interests. For this reason, IEEE and the members of its societies and Standards Coordinating Committees are not able to provide an instant response to interpretation requests except in those cases wh

    33、ere the matter has previously received formal consideration. Comments for revision of IEC/IEEE Dual Logo International Standards are welcome from any interested party, regardless of membership affiliation with the IEC or IEEE. Suggestions for changes in documents should be in the form of a proposed

    34、change of text, together with appropriate supporting comments. Comments on standards and requests for interpretations should be addressed to: Secretary, IEEE-SA Standards Board, 445 Hoes Lane, P.O. Box 1331, Piscataway, NJ 08855-1331, USA and/or General Secretary, IEC, 3, rue de Varemb, PO Box 131,

    35、1211 Geneva 20, Switzerland. Authorization to photocopy portions of any individual standard for internal or personal use is granted by the Institute of Electrical and Electronics Engineers, Inc., provided that the appropriate fee is paid to Copyright Clearance Center. To arrange for payment of licen

    36、sing fee, please contact Copyright Clearance Center, Customer Service, 222 Rosewood Drive, Danvers, MA 01923 USA; +1 978 750 8400. Permission to photocopy portions of any individual standard for educational classroom use can also be obtained through the Copyright Clearance Center. NOTE Attention is

    37、called to the possibility that implementation of this standard may require use of subject matter covered by patent rights. By publication of this standard, no position is taken with respect to the existence or validity of any patent rights in connection therewith. The IEEE shall not be responsible f

    38、or identifying patents for which a license may be required by an IEEE standard or for conducting inquiries into the legal validity or scope of those patents that are brought to its attention. 6 IEC 61691-5:2004(E)IEEE 1076.4-2000(E)Published by IEC under licence from IEEE. 2004 IEEE. All rights rese

    39、rved. IEEE Standard for VITAL ASIC (Application Specic Integrated Circuit) Modeling SpecicationSponsorDesign Automation Standards Committeeof theIEEE Computer SocietyApproved 21 September 2000IEEE-SA Standards BoardAbstract:The VITAL (VHDL Initiative Towards ASIC Libraries) ASIC Modeling Specication

    40、 isdened in this standard. This modeling specication denes a methodology which promotes thedevelopment of highly accurate, efcient simulation models for ASIC (Application-Specic Integrat-ed Circuit) components in VHDL.Keywords:ASIC, computer, computer languages, constraints, delay calculation, HDL,

    41、modeling,SDF, timing, Verilog, VHDL7IEC 61691-5:2004(E)IEEE 1076.4-2000(E)Published by IEC under licence from IEEE. 2004 IEEE. All rights reserved. Copyright 2001 IEEE. All rights reserved.The objectives of the VITAL (VHDL Initiative Towards ASIC Libraries) initiative can be summed up in onesentence

    42、:Accelerate the development of sign-off quality ASIC macrocell simulation libraries written in VHDL byleveraging existing methodologies of model development.The VITAL ASIC modeling specification is a revision of the IEEE 1076.4-1995, IEEE Standard for VITALASIC Modeling Specification. Several new mo

    43、deling enhancements have been added to the standard andseveral usability issues which have been raised with the 1995 standard have been addressed. The newenhancements and usability improvements addressed include: Standardized ASIC memory models Support of IEEE VHDL93 and SDF 1497 standards Multisour

    44、ce interconnect timing simulation SKEW constraint timing checks Timing constraint checks feature enhancements Additional generics to control X generation and message reporting for glitches and timing con-straints. Negative constraint calculation enhancement for vector signals to support memory model

    45、s Fast delay path disable Negative glitch preemptionThese new features will improve the functional, timing accuracy significantly and aid performance of gatelevel VHDL simulations.The major enhancement is the definition of a ASIC memory modeling standard. With the addition of memorymodel package VIT

    46、AL_Memory, a standard is defined which allow memory models to be coded in VHDLmore efficiently. The standard VITAL memory model package provides a method to represent memories,procedures and functions to perform various operations and the definition of a modeling style that promotesconsistency, main

    47、tainability and tool optimization. This standard does not define modeling behavior ofspecific memories. The scope of the memory model standard is currently restricted to ASIC memorymodeling requirement for static RAMs and ROMs. The VITAL memory modeling enhancements arespecified in Clause 10 through

    48、 Clause 12. The VITAL standard memory package is found in Clause 13.The memory model standard is derived from contributed work from the LSI Logic VHDL behavioral modeland Mentor Graphics Memory Table Model (MTM) techniques. The generous support of VHDLInternational provided the needed funding to tak

    49、e these two contributed works and convert them into thememory specification and package code by the IEEE 1076.4 TAG (Technical Action Group) with significantcontribution coming from leading EDA services company GDA Technologies. The technical direction of the working group as well as the day to day activities of issue analysis and draftingof proposed wordings for the specification are the responsibility of the IEEE 1076.4 TAG. This group consistsof Ekambaram Balaji, Prakash Bare, Nitin Chowdhary, Jos


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