1、 IEC TR 63018 Edition 1.0 2015-12 TECHNICAL REPORT Flexible printed circuit boards (FPCBs) Method to decrease signal loss by using noise suppression materials IEC TR 63018:2015-12(en) colour inside THIS PUBLICATION IS COPYRIGHT PROTECTED Copyright 2015 IEC, Geneva, Switzerland All rights reserved. U
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11、on materials INTERNATIONAL ELECTROTECHNICAL COMMISSION ICS 31.180 ISBN 978-2-8322-3082-4 Registered trademark of the International Electrotechnical Commission Warning! Make sure that you obtained this publication from an authorized distributor. colour inside 2 IEC TR 63018:2015 IEC 2015 CONTENTS FOR
12、EWORD . 3 INTRODUCTION . 5 1 Scope 6 2 Normative references 6 3 Test guideline 6 3.1 Apparatus . 6 3.1.1 Network analyzer . 6 3.1.2 Block diagram for signal loss measuring 6 3.2 Test specimen 7 3.2.1 Structure . 7 3.2.2 Preparation 8 3.2.3 Test method 8 3.2.4 Calculation 9 3.2.5 Test result . 9 3.2.
13、6 Analysis . 12 3.3 Improvement method of signal loss for a shield FPCB . 13 Annex A (normative) Block diagram of signal loss test system 14 Figure 1 Bare/shield FPCB . 5 Figure 2 Increment of signal loss using NSMs 5 Figure 3 Signal loss test system . 6 Figure 4 Schematic diagram for two type of te
14、st specimen . 7 Figure 5 Cross-section of shield FPCB . 8 Figure 6 Difference of signal loss between bare and shield FPCBs 9 Figure 7 Signal loss value of the bare and shield FPCB . 10 Figure 8 Signal loss variation according to the Cu conductive layer thickness 11 Figure 9 Signal loss variation acc
15、ording to the Cu signal line width 11 Figure 10 Two types of structure for FPCB . 12 Figure 11 Electric field diagram for two types of shield FPCB . 13 Figure A.1 Block diagram of signal loss test system . 14 Figure A.2 Signal loss test system according to the Agilent network analyzer N5230A . 14 Ta
16、ble 1 Comparison of cut-off frequency with bare/shild FPCB 10 IEC TR 63018:2015 IEC 2015 3 INTERNATIONAL ELECTROTECHNICAL COMMISSION _ FLEXIBLE PRINTED CIRCUIT BOARDS (FPCBs) METHOD TO DECREASE SIGNAL LOSS BY USING NOISE SUPPRESSION MATERIALS FOREWORD 1) The International Electrotechnical Commission
17、 (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and in add
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25、rs of its technical committees and IEC National Committees for any personal injury, property damage or other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and expenses arising out of the publication, use of, or reliance upon, this IEC Publication or
26、 any other IEC Publications. 8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is indispensable for the correct application of this publication. 9) Attention is drawn to the possibility that some of the elements of this IEC Publication ma
27、y be the subject of patent rights. IEC shall not be held responsible for identifying any or all such patent rights. The main task of IEC technical committees is to prepare International Standards. However, a technical committee may propose the publication of a technical report when it has collected
28、data of a different kind from that which is normally published as an International Standard, for example “state of the art“. IEC TR 63018, which is a technical report, has been prepared by IEC technical committee 91: Electronics assembly technology. The text of this technical report is based on the
29、following documents: Enquiry draft Report on voting 91/1284/DTR 91/1309/RVC Full information on the voting for the approval of this technical report can be found in the report on voting indicated in the above table. This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
30、 4 IEC TR 63018:2015 IEC 2015 The committee has decided that the contents of this publication will remain unchanged until the stability date indicated on the IEC website under “http:/webstore.iec.ch“ in the data related to the specific publication. At this date, the publication will be reconfirmed,
31、withdrawn, replaced by a revised edition, or amended. A bilingual version of this publication may be issued at a later date. IMPORTANT The colour inside logo on the cover page of this publication indicates that it contains colours which are considered to be useful for the correct understanding of it
32、s contents. Users should therefore print this document using a colour printer. IEC TR 63018:2015 IEC 2015 5 INTRODUCTION In recent years, since the use of smart phones, and other mobile and display devices has increased significantly, the supply of FPCBs has also been largely extended. Specifically,
33、 since the FPCB devices seek high speed performance, the requirements with respect to electromagnetic interference (EMI) suppression in the devices has also grown in importance. Therefore, FPCBs used inside smart phones employ noise suppression materials (NSMs) to solve EMI problems, as shown in Fig
34、ure 1. Figure 1 Bare/shield FPCB However, an application of noise suppression materials (NSMs) for FPCBs reaches the limit concerning the problem of incrementation of signal loss. Therefore, FPCB and NSMs manufacturers need to analyse signal loss variations of FPCBs shielded by NSMs, as shown in Fig
35、ure 2. Figure 2 Increment of signal loss using NSMs As FPCBs are used with high frequency, the problem of signal loss becomes more significant. As the user of FPCBs has a demand for the lowest value of signal loss by using NSMs, suppliers of FPCBs have to anticipate an appropriate design in order to
36、 achieve an adequate signal loss value. IEC Transmission loss (dB) Frequency (GHz) Bare FPCB Shield FPCB IEC 6 IEC TR 63018:2015 IEC 2015 FLEXIBLE PRINTED CIRCUIT BOARDS (FPCBs) METHOD TO DECREASE SIGNAL LOSS BY USING NOISE SUPPRESSION MATERIALS 1 Scope This Technical Report specifies a guideline fo
37、r improvement of signal loss by using noise suppression materials (hereafter referred to as NSMs) for FPCBs. This Technical Report also indicates a measuring method of signal loss variations of FPCBs using NSMs using network analyzer equipment. In addition, this method only measures the value of the
38、 signal loss variation by using NSMs for FPCBs. This report, however, neither determines nor indicates the structure or material of FPCBs. 2 Normative references The following documents, in whole or in part, are normatively referenced in this document and are indispensable for its application. For d
39、ated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. IEC 62333-1:2006, Noise suppression sheet for digital devices and equipment Part 1: Definitions and general properties 3 Test guideline 3.1 Appar
40、atus 3.1.1 Network analyzer A network analyzer is utilized to identify signal loss data at a specific frequency range of FPCBs. 3.1.2 Block diagram for signal loss measuring Figure 3 indicates one of the examples of the network analyzer setup. Figure 3 Signal loss test system IEC Network analyzer In
41、cident Reflection S11 Transmission S21 IEC TR 63018:2015 IEC 2015 7 3.2 Test specimen 3.2.1 Structure Test specimens shall be designed by two structures, i.e. with and without NSMs in one FPCB board. The part without using NSMs is called bare FPCB. The part using NSMs is called shield FPCB, as shown
42、 in Figure 4. This test coupon shall also be designed as two types in order to have an object of comparison. The first design shall be composed of one bare FPCB with one shield FPCB. A design of this structure allows to compare the bare FPCB with the shield FPCB, as shown in Figure 4 a. The second d
43、esign shall be composed of one bare FPCB with two over shield FPCBs. This structure allows to compare the bare FPCB with the two over shield FPCBs, as shown in Figure 4 b. Figure 4 a Test specimen for comparing one bare FPCB with another shield FPCB Figure 4 b Test specimen for comparing one bare FP
44、CB with two over shield FPCBs Figure 4 Schematic diagram for two type of test specimen The test specimen shall be divided into two halves with one board (bare FPCB and shield FPCB) for equitable estimation with the same Cu line (LW1, LW1). This structure has the merit of uniformly measuring at once
45、a bare and a shield FPCB under the same conditions. IEC Bare FPCB Shield FPCB LW1 5 Via hole LW1 IEC Bare FPCB Shield 1 FPCB LW1 5 Via hole LW1 Shield 2 FPCB LW1 Shield 3 FPCB LW1 Shield n FPCB 8 IEC TR 63018:2015 IEC 2015 The Cu line is formed with a linear distance of direction, because the variat
46、ion of shield effect is very weak for the curved line. The width of Cu line shall be chosen freely in the allowance range of a manufacturing process. The size and spacing of via holes shall not be limited. Especially, via holes offer an important role to contact the NSMs with the ground plan of shie
47、ld FPCB, as shown in Figure 2. However, the size, spacing and amount of via holes shall be as agreed between user and supplier (AABUS). The length of test specimens shall be over 5 cm in order to obtain stable values from measuring equipment. The width and thickness of test specimens shall be in acc
48、ordance with the needs of the end user. Figure 5 indicates one of the examples of a cross-section of a shield FPCB, where the shield region shall be formed just above the bare FPCB. The shield region contains the shield insulation layer, the shield conductive layer and the shield conductive adhesive
49、 layer. Where the shield conductive layer plays a role in an EMI absorber, the shield conductive adhesive layer plays a role for electric interconnection between the shield conductive layer with the ground layer, and the shield insulation layer plays a role to protect the shield conductive layer from direct contact with the external device. Figure 5 Cross-section of shield FPCB However, generally the structure of a test coupon shall also be as agr