1、 IEC 61523-1 Edition 2.0 2012-06 INTERNATIONAL STANDARD Delay and power calculation standards Part 1: Integrated circuit delay and power calculation systems IEC 61523-1:2012(E) IEEE Std 1481-2009 IEEE Std 1481 THIS PUBLICATION IS COPYRIGHT PROTECTED Copyright 2009 IEEE All rights reserved. IEEE is a
2、 registered trademark in the U.S. Patent 35.060 PRICE CODE ISBN 978-2-83220-107-7Warning! Make sure that you obtained this publication from an authorized distributor. IEEE Std 1481Contents 1 Overview.1 1.1 Scope1 1.2 Purpose.2 1.3 Introduction2 2 Normative references3 3 Definitions4 4 Acronyms and a
3、bbreviations.13 5 Typographical conventions.14 5.1 Syntactic elements14 5.2 Conventions.15 6 DPCS flow16 6.1 Overview16 6.1.1 Procedural interface.17 6.1.2 Global policies and conventions17 6.2 Flow of control.17 6.3 DPCMapplication relationships.18 6.3.1 Technology library.18 6.3.2 Subrule.18 6.4 I
4、nteroperability.18 7 Delay calculation language (DCL).19 7.1 Character set.19 7.2 Lexical elements19 7.2.1 Whitespace19 7.2.2 Comments19 7.2.3 Tokens19 7.2.4 Header names31 7.2.5 Preprocessing directives31 7.3 Context.31 7.3.1 Space.31 7.3.2 Plane31 7.3.3 Context operation31 7.3.4 Library parallelis
5、m31 7.3.5 Application parallelism32 7.4 Data types.32 7.4.1 Base types32 7.4.2 Native data types.32 7.4.3 Mathematical calculation data types.32 7.4.4 Pointer data types33 7.4.5 Aggregate data types.33 7.5 Identifiers.39 7.5.1 Name spaces of identifiers39 7.5.2 Storage durations of objects39 7.5.3 S
6、cope of identifiers40 7.5.4 Linkages of identifiers.41 7.6 Operator descriptions.41 7.6.1 String prefix operator41 7.6.2 Explicit string prefix operator.41 7.6.3 Embedded string prefix operator.42 7.6.4 String prefix semantics42 7.6.5 Assignment operator42 7.6.6 New operator.42 7.6.7 SCOPE operator(
7、s)43 ii IEC 61523-1:2012 IEEE Std 1481-20097.6.8 Launch operator.44 7.6.9 Purity operator.44 7.6.10 Force operator45 7.7 Timing propagation45 7.7.1 Timing checks46 7.7.2 Test mode operators.46 7.8 Expressions48 7.8.1 Array subscripting.49 7.8.2 Statement calls.49 7.8.3 General syntax.49 7.8.4 Method
8、 statement calls49 7.8.5 Assign variable reference50 7.8.6 Store variable reference.50 7.8.7 Mathematical expressions.50 7.8.8 Mathematical operators.51 7.8.9 Discrete math expression.52 7.8.10 INT discrete.52 7.8.11 PINLIST discrete.53 7.8.12 Logical expressions and operators53 7.8.13 MODE expressi
9、ons53 7.8.14 Embedded C code expressions55 7.8.15 Computation order.56 7.9 DCL mathematical statements.58 7.9.1 Statement names58 7.9.2 Clauses.58 7.9.3 Modifiers.62 7.9.4 Prototypes64 7.9.5 Statement failure67 7.9.6 Type definition statements.67 7.9.7 Interfacing statements68 7.9.8 DCL to C communi
10、cation.70 7.9.9 Constant statement71 7.9.10 Calculation statements.71 7.9.11 METHOD statement74 7.10 Predefined types.75 7.10.1 ACTIVITY_HISTORY_TYPE.75 7.10.2 HISTORY_TYPE76 7.10.3 LOAD_HISTORY_TYPE.77 7.10.4 CELL_LIST_TYPE.77 7.10.5 TECH_TYPE.78 7.10.6 DELAY_REC_TYPE78 7.10.7 SLEW_REC_TYPE78 7.10.
11、8 CHECK_REC_TYPE78 7.10.9 CCDB_TYPE79 7.10.10 CELL_DATA_TYPE.79 7.10.11 PCDB_TYPE.79 7.10.12 PIN_ASSOCIATION79 7.10.13 PATH_DATA_TYPE.80 7.10.14 STD STRUCT.80 7.11 Predefined variables.80 7.11.1 ARGV80 7.11.2 CONTROL_PARM.81 7.12 Built-in function calls.81 7.12.1 ABS.81 7.12.2 Complex number compone
12、nts.81 7.12.3 EXPAND.82 ii Copyright 2010 IEEE all rights reserved. IEC 61523-1:2012 IEEE Std 1481-2009IEC 61523-1:2012 IEEE Std 1481-2009 iii 7.12.4 Array functions82 7.12.5 Messaging functions82 7.13 Tables.84 7.13.1 TABLEDEF statement.85 7.13.2 Table visibility rules87 7.13.3 TABLE statement87 7.
13、13.4 LOAD_TABLE statement.91 7.13.5 UNLOAD_TABLE statement.93 7.13.6 WRITE_TABLE statement94 7.13.7 ADD_ROW statement.94 7.13.8 DELETE_ROW statement95 7.14 Built-in library functions96 7.14.1 Numeric conversion functions.96 7.14.2 Tech_family functions.98 7.14.3 Trigonometric functions99 7.14.4 Cont
14、ext manipulation functions99 7.14.5 Debug controls101 7.14.6 Utility functions.102 7.14.7 Table functions102 7.14.8 Subrule controls.103 7.15 Library control statements.104 7.15.1 Meta-variables.105 7.15.2 TECH_FAMILY105 7.15.3 RULENAME.105 7.15.4 CONTROL_PARM.105 7.15.5 SUBRULE statement105 7.15.6
15、Path list expansion rules106 7.15.7 SUBRULES statement107 7.15.8 Control file107 7.15.9 TECH_FAMILY statement109 7.15.10 SUBRULE and SUBRULES statements.109 7.16 Modeling110 7.16.1 Types of modeling.110 7.16.2 Model organization111 7.16.3 MODELPROC statement112 7.16.4 SUBMODEL statement.113 7.16.5 M
16、odeling statements114 7.16.6 TEST_BUS statement.124 7.16.7 INPUT statement.124 7.16.8 OUTPUT statement.128 7.16.9 DO statement.129 7.16.10 PROPERTIES statement.153 7.16.11 SETVAR statement154 7.17 Embedded C code155 7.18 Definition of a subrule.155 7.19 Pragma.156 7.19.1 IMPORT_EXPORT_TAG.156 8 Powe
17、r modeling and calculation.157 8.1 Power overview157 8.2 Caching state information158 8.2.1 Initializing the state cache.158 8.2.2 State cache lifetime.158 8.3 Caching load and slew information.158 8.3.1 Loading the load and slew cache.159 8.3.2 Load and slew cache lifetime159 iii Copyright 2010 IEE
18、E all rights reserved. iv IEC 61523-1:2012 IEEE Std 1481-20098.4 Simulation switching events159 8.5 Partial swing events.160 8.6 Power calculation.160 8.7 Accumulation of power consumption by the design162 8.8 Group Pin List syntax and semantics.162 8.8.1 Syntax162 8.8.2 Semantics.162 8.8.3 Example.
19、163 8.9 Group Condition List syntax and semantics163 8.9.1 Syntax163 8.9.2 Semantics.163 8.9.3 Example.164 8.10 Sensitivity list syntax and semantics164 8.10.1 Syntax164 8.10.2 Semantics.164 8.10.3 Example.165 8.11 Group condition language165 8.11.1 Syntax165 8.11.2 Semantics.166 8.11.3 Condition ex
20、pression operator precedence168 8.11.4 Condition expressions referencing pin states and transitions168 8.11.5 Semantics of nonexistent pins.168 9 Application and library interaction.170 9.1 behavior model domain170 9.2 vectorTiming and vectorPower model domains170 9.2.1 Power unit conversion.170 9.2
21、.2 Vector power calculation.171 10 Procedural interface (PI).172 10.1 Overview172 10.1.1 DPCM172 10.1.2 Application172 10.1.3 libdcmlr.172 10.2 Control and data flow.173 10.3 Architectural requirements.173 10.4 Data ownership technique173 10.4.1 Persistence of data passed across the PI173 10.4.1 Dat
22、a cache guidelines for the DPCM174 10.4.2 Application/DPCM interaction174 10.4.3 Application initializes message/memory handling174 10.4.4 Application loads and initializes the DPCM.174 10.4.5 Application requests timing models for cell instances175 10.5 Model domain issues175 10.5.1 Model domain se
23、lection175 10.5.2 Model domain determination175 10.5.3 DPCM invokes application modeling callback functions.175 10.5.4 Application requests propagation delay176 10.5.5 DPCM calls application EXTERNAL functions.177 10.6 Reentry requirements.177 10.7 Application responsibilities when using a DPCM.177
24、10.7.1 Standard Structure rules177 10.7.2 User object registration.177 10.7.3 Selection of early and late slew values178 10.7.4 Semantics of slew values.178 10.7.5 Slew calculations.179 iv Copyright 2010 IEEE all rights reserved. IEC 61523-1:2012 IEEE Std 1481-2009IEC 61523-1:2012 IEEE Std 1481-2009
25、 v 10.8 Application use of the DPCM179 10.8.1 Initialization of the DPCM179 10.8.2 Context creation180 10.8.3 Dynamic linking180 10.8.4 Subrule initialization.181 10.8.5 Use of the DPCM181 10.8.6 Application control181 10.8.7 Application execution182 10.8.8 Termination of DPCM.182 10.9 DPCM library
26、organization182 10.9.1 Multiple technologies182 10.9.2 Model names.183 10.9.3 DPCM error handling183 10.10 C level language for EXPOSE and EXTERNAL functions183 10.10.1 Integer return code.183 10.10.2 The Standard Structure pointer184 10.10.3 Result structure pointer.184 10.10.4 Passed arguments.184
27、 10.10.5 DCL array indexing.184 10.10.6 Conversion to C data types184 10.10.7 include files.185 10.11 PIN and BLOCK data structure requirements186 10.12 DCM_STD_STRUCT Standard Structure.186 10.12.1 Alternate semantics for Standard Structure fields.189 10.12.2 Reserved fields190 10.12.3 Standard Str
28、ucture value restriction190 10.13 DCMTransmittedInfo structure190 10.14 Environment or user variables.190 10.15 Procedural interface (PI) functions summary190 10.15.1 Expose functions.191 10.15.2 External functions199 10.15.3 Deprecated functions.202 10.16 Implicit functions.205 10.16.1 libdcmlr.205
29、 10.16.2 Run-time library utility functions206 10.16.3 Memory control functions.206 10.16.4 Message and error control functions.208 10.16.5 Calculation functions.208 10.16.6 Modeling functions208 10.17 PI function table description209 10.17.1 Arguments209 10.17.2 DCL syntax210 10.17.3 C syntax.210 1
30、0.18 PI function descriptions.210 10.18.1 Interconnect loading related functions210 10.18.2 Interconnect delay related functions217 10.18.3 Functions accessing netlist information221 10.18.4 Functions exporting limit information229 10.18.5 Functions getting/setting model information231 10.18.6 Funct
31、ions importing instance name information.244 10.18.7 Process information functions.246 10.18.8 Miscellaneous standard interface functions247 10.18.9 Power-related functions.257 10.19 Application context265 10.19.1 pathData association265 v Copyright 2010 IEEE all rights reserved. vi IEC 61523-1:2012
32、 IEEE Std 1481-200910.20 Application and library interaction265 10.20.1 behavior model domain.266 10.20.2 vectorTiming and vectorPower model domains267 10.20.3 Power unit conversion.267 10.20.4 Vector power calculation.267 10.21 Parasitic analysis268 10.21.1 Assumptions268 10.21.2 Parasitic networks
33、268 10.21.3 Basic definitions268 10.21.4 Parasitic element data structure.270 10.21.5 Coordinates274 10.21.6 Parasitic subnets274 10.21.7 Pin parasitics282 10.21.8 Modeling internal nodes285 10.21.9 Load and interconnect models.287 10.21.10 Obtaining parasitic networks.291 10.21.11 Persistent storag
34、e of load and interconnect models.292 10.21.12 Calculating effective capacitances and driving resistances.295 10.21.13 Parasitic estimation298 10.21.14 Threshold voltages.303 10.21.15 Obtaining aggressor window overlaps304 10.22 Noise analysis.311 10.22.1 Types of noise312 10.22.2 Noise models.313 1
35、0.22.3 Noise waveforms.315 10.22.4 Noise network models.322 10.22.5 Calculating composite noise at cell inputs327 10.22.6 Calculating composite noise at cell outputs330 10.22.7 Setting noise budgets.334 10.22.8 Reporting noise violations.335 10.23 Delay and slew calculations for differential circuit
36、s338 10.23.1 Sample figures.338 10.23.2 appGetArrivalOffsetsByName339 10.23.3 API extensions for function modeling.340 10.23.4 Explicit APIs for user-defined primitives348 10.23.5 APIs for hierarchy.350 10.23.6 Built-in APIs for function modeling350 10.23.7 API Extensions for VECTOR modeling351 10.2
37、3.8 APIs for XWF352 10.23.9 Extensions and changes to voltages and temperature APIs.356 10.23.10 Operating conditions.358 10.23.11 On-chip process variation360 10.23.12 Accessing properties and attributes.367 10.23.13 APIs for attribute within a PIN object.387 10.23.14 Connectivity395 10.23.15 Contr
38、ol of timing arc existence and state397 10.23.16 Modeling cores402 10.23.17 Default pin slews and interface version calls407 10.23.18 API to access library required resources.408 10.23.19 Resource types.410 10.23.20 Library extensions for phase locked loop processing411 10.23.21 API definitions for
39、external conditions.412 10.23.22 Extensions for listing pins.416 10.23.23 Memory BIST mapping.417 10.23.24 dpcmGetCellTestProcedure.419 vi Copyright 2010 IEEE all rights reserved. IEC 61523-1:2012 IEEE Std 1481-2009IEC 61523-1:2012 IEEE Std 1481-2009 vii 10.24 Interconnect delay calculation intrafac
40、e419 10.24.1 Control and data flows420 10.24.2 Model generation functions.421 10.24.3 Calculation functions.423 10.24.4 Cell calculation functions424 10.24.5 ICM initialization429 10.25 DCL run-time support435 10.25.1 Array manipulation functions435 10.25.2 Memory management438 10.25.3 Structure man
41、ipulation functions439 10.25.4 Initialization functions.443 10.26 Calculation functions.455 10.26.1 delay455 10.26.2 slew456 10.26.3 check457 10.27 Modeling functions459 10.27.1 modelSearch459 10.27.2 Mode operators461 10.27.3 Arrival time merging.462 10.27.4 Edge propagation communication to the ap
42、plication462 10.27.5 Edge propagation communication to the DPCM466 10.27.6 newTimingPin.466 10.27.7 newDelayMatrixRow467 10.27.8 newNetSinkPropagateSegments468 10.27.9 newNetSourcePropagateSegments470 10.27.10 newPropagateSegment471 10.27.11 newTestMatrixRow.471 10.27.12 newAltTestSegment.472 10.27.
43、13 Interactions between interconnect modeling and modeling functions473 10.28 Deprecated functions473 10.28.1 Parasitic handling474 10.28.2 Array manipulation functions482 10.28.3 Memory management484 10.28.4 Initialization functions.487 10.29 Standard Structure (std_stru.h) file499 10.30 Standard m
44、acros (std_macs.h) file.519 10.31 Standard interface structures (dcmintf.h) file527 10.32 Standard loading (dcmload.h) file531 10.33 Standard debug (dcmdebug.h) file.534 10.34 Standard array (dcmgarray.h) file561 10.35 Standard user array defines (dcmuarray.h) file566 10.36 Standard platform-depende
45、ncy (dcmpltfm.h) file570 10.37 Standard state variables (dcmstate.h) file576 11 Parasitics.580 11.1 Introduction580 11.2 Targeted applications for SPEF580 11.3 SPEF specification.580 11.3.1 Grammar580 11.3.2 Escaping rules582 11.3.3 File syntax583 11.3.4 Comments589 11.3.5 File semantics589 11.4 Examples609 11.4.1 Basic *D_NET file609 11.4.2 Basic *R_NET file.612 11.4.3 *R_NET with poles and residues plus name mapping613 vii Copyright 2010 IEEE all rights reserved. viii IEC 61523-1:2012 IEEE Std 1481-2009
