1、SMPTE 244M-2003 Revision of ANSVSMPTE 244M-1995 SMPTE STANDARD for Television - System M/NTSC Composite Video Signals - Bit-Parallel Digital Interface Page 1 of 19 pages 1 Scope 1.1 This standard describes a bit-parallel composite video digital interface for systems operating according to the 525-li
2、ne, 59.94-Hz NTSC standard, as described by SMPTE 170M, sampled at four times color subcarrier frequency. Sampling parameters for the digital representation of encoded video signals, the relationship between sampling phase and color subcarrier, and the digital levels of the video signal are defined.
3、 1.2 This standard has .application for use with shielded twisted 12-pair cable of conventional design over distances up to 50 m, without transmission equalization or any special equalization of the receiver. Longer cable lengths may be used, but with rapidly increasing requirement for care in the c
4、able selection and possible receiver equalization or the use of active repeaters or both. 1.3 Digital composite video signals, as defined by this standard, are the signals conveyed by the composite implementation of the serial digital interface. It should be noted that addiiional information to that
5、 described by this standard is also carried by the serial digital interface. The serial digital interface is the preferred method for the interconnection of composite digital equipments when cable lengths exceed 50 m. 2 Normative references The following standards contain provisions which, through r
6、eference in this text, constitute provisions of this standard. At the time of publication, the editions indicated were valid. All standards are subject to revision, and parties to agreements based on this standard are encouraged to investigate the possibility of applying the most recent edition of t
7、he standards indicated below. SMPTE 170M-1999, Television - Composite Analog Video Signal - NTSC for Studio Applications IS0 21 10:1989, Information Technology - Data Communication - 25-Pole DTUDCE Interface Connector and Contact Number Assignments ITU-R BT.471-1 (07/86), Nomenclature and Descriptio
8、n of Colour Bar Signals 3 General specifications 3.1 The analog signal shall be sampled at a rate of four times the color subcarrier frequency along the I and Q axes. The phase reference for the sample clock shall be color subcarrier (kc). Many systems will derive this phase reference from the burst
9、 of the analog signal. Copyright Q 2003 by THE SOCIETY OF MOTION PICNRE AND TELEVISION ENGINEERS 595 W. Harisdale Ave., White Plains, NY 10607 (914) 761-1100 Approved February 7,2003 SMPTE 244M-2003 3.2 Color subcarrier phase to horizontal sync timing (SC/H) in the digital domain shall be zero. 3.3
10、The quantization scale shall be uniformly quantized PCM at 10 bits per sample. Eight bits per sample video data may be carried across the interface by using the eight most significant bits and setting the two least significant bits to zero. 3.4 The bits of the digital words that describe the video s
11、ignal are transmitted in a parallel arrangement using 10 conductor pairs. An eleventh conductor pair carries a clock signal at 4fsc (1 4.31 81 8 MHz). 3.5 The interface consists of one transmitter and one receiver in a point-to-point connection. 4 Sampling structure and quantization specifications 4
12、.1 Sampling structure Figure 1 depicts the line and field structure of the NTSC signal during the vertical blanking interval. Burst locked sinewave, shown in figure 1, is defined as a continuous sinewave at iubcarrier frequency, with the same phase as burst. 4.1.1 There are 91 O samples in a horizon
13、tal line period; 768 samples constitute the digital active video portion of each line. The remaining 142 samples comprise the digital horizontal blanking interval. Each of the four samples during a color subcarrier period is described by the chrominance signal axis that it falls on. Figure 2 shows t
14、he derivation of the sample sequence. Figure 3 depicts the sample numbering for a nominal NTCC signal. The half-amplitude point of the leading (falling) edge of the analog horizontal sync signal falls between samples 784 and 785. The first of the 910 samples represents the first sample of the digita
15、l active line and is designated sample O for the purpose of reference. The 910 samples per line are, therefore, numbered O through 909. Samples O through 767 inclusive contain the digital active line video data. 4.1.2 The sample at sample O, line 10, field 1, color frame A is an I axis (+123“) sampl
16、e. (See figure 4.) 4.2 Quantization specifications 4.2.1 The digital video signal shall be quantized according to table 1. Table 1 - Signal quantization I 8-bit system 1 O-bit system I White level c8h 320h Blanking level 3ch OFOh Svnc tiD level 04h 010h I NOTE - The “h“ suffix indicates a hexadecima
17、l value 4.2.2 The amplitude relationship between the digital signal and an equivalent analog signal is shown in figure 5. The signal illustrated is a representation of 100% level, 7.5% setup (1 OOP.5/1 OOPS) color bars. 4.2.3 The characteristics of the data word are based on the assumption that the
18、location of any required (sin x)/x correction is at the point where the digital signal is converted to an analog form. Page 2 of 19 pages CMPTE 244M-2003 ?F+ T E- t !E i Page 3 of 19 pages SMPTE 244M-2003 Digital Blankirg 142 Sample Intervals ( 768 - 909) Burst Locked I Q Sinusoid B sin (2nf,t +1W)
19、I WS (219,t +33“) Q sin(2d,t+33“) Digital Active Line 768 Sample Intewals (O - 767) O -I -Q I Q -I -Q I NOTE -The equation for the chrominance signal is E = I cos (2xfsct +33“) + Q sin (2nfsct +33“). The equation for the burst locked sinusoid is E = B sin (2xfsct +180“). Figure 2 - Derivation of sam
20、ple sequence 50% 44.2 ns - Leading . Sample 782 783 784 785 786 787 Nuder I ,I Horizontal Reference 4 / Analog Line Peial% 4 Is pol3 I + I I Page 1 O of 19 pages CMPTE 244M-2003 I (u a ,$ C O I I - s - z O U w O - o - Q 2 - c 6 i3 - e O $ O U I i$ la za Is L Is -FE- I Page 11 of 19 pages SMPTE 244M-
21、2003 5.4.4 Some models of digital composite video equipment may use values for the samples in the digital vertical blanking interval that differ from those listed in table 4. However, the range of values must conform to the tolerances laid down for the analog signal by SMPTE 170M. Designers of recei
22、vers for this interface should consider the effects of such changes when implementing detection circuits. 5.5 Digital horizontal blanking interval 5.5.1 The digital horizontal blanking interval extends from sample 768 to sample 909 inclusive, on all lines outside the digital vertical blanking interv
23、al. 5.5.2 Digital data within the digital horizontal blanking interval shall consist of a digital representation of an analog horizontal blanking interval, with a burst of O SC/H phase. A 1 O-bit representation is preferred. Where 8-bit values are used, the sample values are selected to maximize the
24、 accuracy of representation of the burst. Suggested values are shown in table 5. Table 5 - 10- and 8-bit hexadecimal values for the digital horizontal blanking interval 1 O-bit sample values 8-bit sample values Word O“ 180“ O“ 180“ 768-782 783 784 785 876 787-849 850 851 852 853 654-856 857 858 859
25、860 861 862 863 864 865 866 867 868 869 870 871 872 873 OF0 OE9 OA4 O44 o1 1 o1 o 017 05C OBC OEF OF0 OF0 OF4 ODC OD6 12c 123 096 OB3 14E 12D 092 OB3 14E 12D 092 OB3 O FO OE9 OA4 O44 o1 I o1 o 017 05C OBC OEF OF0 OF0 OEC 104 1 OA OB4 OBD 14A 12D 092 OB3 14E 12D 092 OB3 14E 12D 3c 3A 29 11 4 4 6 17 2
26、F 3c 3c 3c 3D 37 36 48 49 25 2D 53 4B 25 2D 53 48 25 2D 3c 3A 29 11 4 4 6 17 2F 3c 3c 3c 38 41 42 2D 2F 53 48 25 2D 53 4B 25 2D 53 46 14E 092 53 25 1 O-bit sample values 8-bit sample values Word O“ 180“ O“ 180“ 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 8
27、96 897 898 899 900-909 12D 092 OB3 14E 120 092 OB3 14E 12D 092 OB3 14E 12D 092 OB3 14E 12D 092 OB3 14E 129 OA6 OCD 112 OFA OEC OF0 OB3 14E 12D 092 OB3 14E 12D 092 OB3 14E 12D 092 OB3 14E 12D 092 OB3 14E 12D 092 OB7 13A 113 OCE OE6 OF4 OF0 48 25 2D 53 4B 25 2D 53 4B 25 2D 53 48 25 2D 53 4B 25 2D 53 4
28、A 2A 33 44 3F 3B 3c 2D 53 48 25 2D 53 48 25 2D 53 48 25 2D 53 48 25 2D 53 4B 25 2E 4E 45 34 39 3D 3c Page 12 of 19 pages SMPTE 244M-2003 5.5.3 The location and magnitude of the samples during the digital horizontal blanking region are shown in figure 8. 5.5.4 Some models of digital composite video e
29、quipment may use values for the samples in the digital horizontal blanking interval that differ from those listed in table 5. However, the range of values must conform to the tolerances laid down for the analog signal by SMPTE 170M and by this standard in respect of O SC/H phase. Designers of receiv
30、ers for this interface should consider the effects of such changes when implementing detection circuits. NOTE - There are Wo sets of values listed in the table for both the 10-bit and 8-bit sample values. The first value is designated as being O“ and represents the sample values that are used when t
31、he phase of the burst is positive. The second value is designated as being 180“ and represents the sample values that are used when the phase of the burst is negative. 6 Electrical characteristics 6.1 Signai conventions 6.1.1 The signals shall be transmitted via balanced signal pairs. Although the u
32、se of ECL technology is not mandated, the line driver and receiver shall be ECL compatible to permit the use of standard ECL parts for either or both ends. In this standard, “standard ECL“ refers to the 10,000 series of ECL logic. 6.1.2 The signalling sense of the voltage appearing across the interc
33、onnection cable is positive binary and defined as follows: The DATA terminal of the generator shall be positive (+) with respect to the RETURN terminal for a binary 1 (HIGH or H or ON) state. The DATA terminal of the generator shall be negative (-) with respect to the RETURN terminal for a binary O
34、(LOW or L or OFF) state. (See figure 9.) 6.1.3 The data lines are designated DATA O through DATA 9. DATA 9 is the most significant bit. 6.2 Transmitter characteristics 6.2.1 The transmitter shall have a balanced output with a maximum impedance of 11 O ohms. 6.2.2 The common mode voltage of the line
35、driver shall be -1.3 V * 15% with reference to the ground terminals. 6.2.3 The generated signal shall lie between 0.8 V and 2.0 V peak-to-peak, measured across a 110-ohm resistor connected to the output terminals without any transmission line. 6.2.4 Rise and fall times shall be no longer than 5 ns a
36、nd differ by not more than 2 ns, as measured between the 20% and 80% amplitude points, across a 11 O-ohm resistor connected to the output terminals without any transmission line. 6.3 Receiver characteristics 6.3.1 The cable shall be terminated by 110 ohms i 10 ohms. 6.3.2 The line receiver must prop
37、erly sense the binary data when connected directly to a line driver operating at the extreme voltage limits permitted by 6.2.3. 6.3.3 The receiver shall require a differential input voltage of no more than 185 mV to correctly attain the intended binary state. 6.3.4 The receiver shall operate correct
38、ly in the presence of common mode noise having a maximum amplitude of f 0.5 V. 6.3.5 The receiver shall operate with a different delay between the received clock and any received data signals of up to 15 ns. Page 13 of 19 pages CMPTE 244M-2003 Page 14 of 19 pages SMPTE 244M-2003 Inter-Connecting Cab
39、le Load b Receiver q/ Transmitter I/ I I I 1- A, A = B, B = zt - A, B = A,B = C - C - vg = zo = Data line Return line Cable termination Transmitter interface points Load interface points Transmitter circuit ground Load circuit ground Ground potential difference Cable characteristic impedance Figure
40、9 - Balanced interface circuit 6.4 Clock signal 6.4.1 The clock signal is a 4fsc square wave as shown in figure 10. The clock pulse width (Tw) is 35 ns f 5 ns. 6.4.2 The peak-to-peak jitter between rising edges of the clock shall be within 5 ns of the average time of the rising edge computed over at
41、 least one television field. NOTE - This jitter specification, while appropriate for an effective parallel interface, is not suitable for clocking digital-to- analog conversion or paraiiel-to-serial conversion. 6.4.3 The positive transition of the clock signal nominally occurs between the data trans
42、itions. Page 15 of 19 pages SMPTE 244M-2003 tw = 35nsi5 ns tc = 1/4f (approximately 69.8 ns) td = 35nsi5 ns Figure 10 - Digital interface clock waveform 7 Mechanical Characteristics 7.1 General This clause defines the mechanical specifications for the interface of digital video systems used in envir
43、onments where the physical distance between the devices is limited and the general physical environment can be termed interior. The majority of applications of this interface involve cable lengths of less than 50 m. For these lengths, cables with reasonable uniformity between pairs will, generally,
44、give satisfactory results. For cable lengths greater than 50 m, cable specifications and termination characteristics become more critical and it is likely that equalization will be required. 7.2 interconnecting cable 7.2.1 The interface is designed to operate with a nominal signal-pair impedance of
45、11 O ohms. 7.2.2 The cable shall contain 12 pairs of conductors of which 11 pairs shall be used as signal lines. The remaining pair shall be used as system ground. Page 16 of 19 pages SMPTE 244M-2003 7.2.3 It is recommended that the cable be constructed to minimize the effects of crosstalk between s
46、ignal lines, the susceptibility of the signal lines to external noise, and the transmission of interface signals to the external environment. 7.2.4 The cable shall have an outer shield, to minimize radiation, carriedthrough the cable assembly. This shield shall be terminated via the chassis ground p
47、in and the connector body at each end. 7.2.5 The cable shall be constructed to minimize the differential time delay between any two of the conductor pairs. 7.3 Connectors 7.3.1 The connectors shall have the mechanical characteristics conforming to the industry standard 25-pin subminiature type D, as
48、 described below. Additional information may be found in IS0 21 10. (This interface will require that the connectors be inserted many times. ECL voltage and current levels are relatively low. Thus, the materials in the connector should be appropriate to the application.) 7.3.2 Cable connectors emplo
49、y pin contacts and equipment connectors employ socket contacts (see figure 11). Connector with cocket contacts and female screw locks or mating threads Connector with pin contacts rr and 2 #440 screws Transmitter I I I Receiver 4 4- -I Connector with pin contacts and 2 #MO screws Connector with socket contacts and female screw locks or mating threads Figure 11 - Cable connector configuration Page 17 of 19 pages SMPTE 244M-2003 7.3.3 Cable connectors shall be provided with No. 4-40 mounting screws and equipment connectors shall be provided with female screw locks or mating threads
