1、 GODDARD TECHNICAL STANDARD GSFC-STD-6001 Goddard Space Flight Center Approved: 02-22-2011 Greenbelt, MD 20771 Expiration Date: 02-22-2016 Superseding GSFC-STD-XXXXR Ceramic Column Grid Array Design and Manufacturing Rules for Flight Hardware February 22, 2011 The latest version of this standard is
2、located at the GSFC Standards website at http:/standards.gsfc.nasa.gov Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-GSFC-STD-6001 2 of 21 DOCUMENT HISTORY LOG Status Document Revision Approval Date Description Baseline - 02-22-2011 Initial Release
3、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-GSFC-STD-6001 3 of 21 FOREWORD This standard is published by the Goddard Space Flight Center (GSFC) to provide uniform engineering and technical requirements for processes, procedures, practices, and m
4、ethods that have been endorsed as standard for NASA programs and projects, including requirements for selection, application, and design criteria of an item. This standard establishes requirements which apply to all uses on flight hardware of ceramic-packaged electronic parts which are solder-attach
5、ed to printed circuit boards with solder columns (ceramic column grid array attachments or CCGAs). The requirements address as-received part inspection, printed circuit board design, manufacturing process and quality control, process inspection points, inspection techniques and associated inspection
6、 criteria, rework, and process control validation testing. These requirements do not address subassembly-level design qualification. Requests for information, corrections, or additions to this standard should be submitted via “Feedback” in the GSFC Technical Standards System at http:/standards.gsfc.
7、nasa.gov. In this document, a requirement is identified by “shall,” a good practice by “should,” permission by “may” or “can,” expectation by “will,” and descriptive material by “is.” Approval by: Original signed by: Original signed by: _ _ George Alcorn Steven Scott GSFC Technical Standards Coordin
8、ator GSFC Chief Engineer Concurrence by: Original signed by: Original signed by: _ _ Judith Bruner Dennis Andrucyk Director of Safety and Mission Assurance Director of Applied Engineering and Technology Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,
9、-GSFC-STD-6001 4 of 21 SECTION TABLE OF CONTENTS PAGE DOCUMENT HISTORY LOG . 2 FOREWORD . 3 TABLE OF CONTENTS . 4 LIST OF FIGURES . 5 LIST OF TABLES . 5 1.0 SCOPE . 6 1.1 Purpose . 6 1.2 Applicability . 6 2.0 APPLICABLE DOCUMENTS . 6 2.1 General 6 2.2 Government Documents . 6 2.3 Non-Government Docu
10、ments . 7 2.4 Order of Precedence . 7 3.0 ACRONYMS AND DEFINITIONS 7 3.1 Acronyms/Definitions 7 4.0 REQUIREMENTS . 8 4.1 Manufacturing and Quality Control processes . 8 4.2 Incoming Parts Inspections . 8 4.2.1 Parts Approval 8 4.2.2 Part/Column Design . 8 4.2.3 Visual Inspection 9 4.2.4 Column Co-pl
11、anarity 9 4.2.5 Solder Mask Inspection 9 4.2.6 CCGA Land Area Inspection . 10 4.2.7 Use of Units Rejected during Screening . 10 4.3 Printed Circuit Board Design 10 4.3.1 Mechanical Design Analysis and Design Approval . 10 4.3.2 Board Flatness . 10 4.3.3 Solder Surface Finish 10 4.3.4 Pad Diameter .
12、11 4.3.5 Solder Mask 11 4.3.6 Vias . 11 4.3.7 CCGA Placement Clearance (in the layout) . 11 4.3.8 4.3.9 Mechanical Part Retention. PWB Design Review 11 12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-GSFC-STD-6001 5 of 21 4.4 Manufacturing Process
13、 Parameters 12 4.4.1 Applicability of NASA-STD-8739.2 Requirements . 12 4.4.2 Underfill 12 4.4.3 Solder Volume 12 4.4.4 Part Placement . 12 4.4.5 Reflow Profile . 13 4.4.5.1 Reflow Profile Design 13 4.4.5.2 Temperature Quality Control 13 4.4.6 Post Solder Cleaning . 13 4.4.7 Post-Soldering Inspectio
14、n . 13 4.4.7.1 Visual Inspection of Outer Column Solder Joints 13 4.4.7.2 Radiographic Inspection (X-ray) 14 4.4.8 Staking 15 4.4.9 Conformal Coating . 15 4.4.10 Inspection Methods . 15 4.5 Part Removal and Replacement 16 4.6 4.7 Process Control Validation Testing Qualification Testing 17 17 Appendi
15、x A Technology Background . 19 LIST OF FIGURES FIGURE PAGE 1 Example of Acceptable Column Tilt up to 10 Degrees 14 2 Example of a Tilted X-ray View of CCGA Columns . 14 A-1 Elements of a CCGA Package 19 A-2 High Melt Temperature Solder Columns . 20 A-3 Construction of Individual Reinforced Solder Co
16、lumns 20 LIST OF TABLES TABLE PAGE 1 Typical CCGA Package Designs 9 2 Inspection Requirements Summary 16 3 Process Validation Testing . 18 A-1 CTE of Materials Commonly used in a CCGA Attached Assembly 20 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,
17、-,-GSFC-STD-6001 6 of 21 Ceramic Column Grid Array Design and Manufacturing Rules for Flight Hardware 1.0 SCOPE 1.1 Purpose The purpose of this standard is to provide requirements and recommendations intended to facilitate production of defect-free ceramic column grid array solder joint interconnect
18、s to boards intended for use in space flight applications (refer to Appendix A, Technology Background). This standard does not provide application specific reliability test requirements (e.g. qualification requirements). 1.2 Applicability This standard is applicable to all uses on flight hardware of
19、 ceramic packaged electronic parts which are solder-attached to printed circuit boards with solder columns (ceramic column grid array attachments or CCGAs). 2.0 APPLICABLE DOCUMENTS 2.1 General The documents listed in this section contain provisions that constitute requirements of this standard as c
20、ited in the text of Section 4.0, Requirements. The latest issuances of cited documents shall be used unless otherwise approved by the assigned Technical Authority. The applicable documents are accessible via the NASA Technical Standards System at http:/standards.nasa.gov, directly from the Standards
21、 Developing Organizations, or from other document distributors. 2.2 Government Documents IPC J-STD-001xS Space Applications Electronic Hardware Addendum to J-STD-001x Requirements for Soldered Electrical and Electronic Assemblies* MIL-STD-883 Test Method for Microcircuits, Method 2009 NASA-STD-8739.
22、1A Workmanship Standard for Polymeric Application on Electronic Assemblies NASA-STD-8739.2 Surface Mount Technology NPD 8730.2 NASA Parts Policy * The “x” in the document number is a placeholder for the revision letter. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic
23、ense from IHS-,-,-GSFC-STD-6001 7 of 21 2.3 Non-Government Documents AS9100 Quality Management Systems Aerospace - Requirements IPC-6012 Qualification and Performance Specification for Rigid Printed Boards IPC- 9701 Performance Test Methods and Qualification Requirements for Surface Mount Solder Att
24、achments IPC-TM-650 Test Method for Bow and Twist (Percentage) 2.4 Order of Precedence When this standard is applied as a requirement or imposed by contract on a GSFC program or GSFC project, the technical requirements of this standard take precedence, in the case of conflict, over the technical req
25、uirements cited in applicable documents or referenced guidance documents. 3.0 ACRONYMS AND DEFINITIONS 3.1 Acronyms/Definitions CGA Column Grid Array Surface mount packaging that utilizes a grid pattern of solder columns as interconnects to the printed wiring board. CCGA Ceramic Column Grid Arrays C
26、GAs specifically using ceramic body packaging. CM Configuration Management CTE Coefficient of Thermal Expansion Changes in volume of a material as afunction of changes in temperature ENIG Electroless Nickel Immersion Gold ESD Electrostatic Discharge FPGA Field Programmable Gate Array A programmable
27、part which is used for data processing. Typical spaceflight packaging for this part consists of gull wing type leads on the sides of the package; however, current designs are using CCGA packaging. I/O Input/Output LGA Land Grid Array PDL Product Design Lead PR/PFR Problem Report/Problem Failure Repo
28、rt Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-GSFC-STD-6001 8 of 21 PWA Printed Wiring Assembly A printed wiring board populated with parts. PWB Printed Wiring Board QTP Qualification Test Plan SMT Surface Mount Technology A method of mounting e
29、lectronic parts directly to the surface of a printed wiring board, instead of using through-hole technology. This method is commonly used in todays printed wiring assemblies. 4.0 REQUIREMENTS 4.1 Manufacturing and Quality Control Processes Manufacturing and quality control processes shall be establi
30、shed as a minimum for: a. Solder reflow equipment temperature, calibration and reflow profile configuration management (CM) control b. Parts, materials and board storage and handling c. Contamination control d. Solder paste deposition methods and quality control e. Part placement quality control f.
31、Proper selection and use of inspection equipment g. Failure root cause investigation and corrective action 4.2 Incoming Parts Inspections 4.2.1 Parts Approval All CCGA parts shall meet GSFC project specific mission assurance requirements for part selection and approval prior to use in flight hardwar
32、e. 4.2.2 Part/Column Design The package, solder, column materials, and number of columns shall be identified and documented on the assembly drawing and/or parts list. This information will be required for mechanical analysis and radiographic inspections. Table 1 lists typical materials. Reliability
33、Note 4.1: The further the pins are from the package center point, or neutral point, the greater the thermally induced stress is on the solder joint; therefore parts with fewer columns are preferred. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-GSF
34、C-STD-6001 9 of 21 Table 1. Typical CCGA Package Designs Package Body Material Column Material Package-to-Column solder Column Size (h x d, mm) Column Pitch (mm) Ceramic Pb90Sn10 (IBM type) Eutectic tin-lead solder 1.62 x 0.89 1.27 Ceramic Pb90Sn10 (IBM type) Eutectic tin-lead solder 2.21 x 0.51 1.2
35、7 Ceramic Pb80Sn20, Sn-plated Cu wrap, Sn63Pb37 finish (Six-Sigma type) Eutectic tin lead solder 2.21 x 0.51 1.27 Ceramic Pb80Sn20, Sn-plated Cu wrap, Sn63Pb37 finish (Six-Sigma type) Eutectic tin lead solder 2.21 x 0.51 1.00 4.2.3 Visual Inspection All CCGA packages and columns shall be inspected p
36、rior to installation. Ten times (10X) magnification shall be used to establish that the parts comply with the following criteria: a. No defects in the part body as defined in MIL-STD-883, Method 2009. b. Package to column solder joint meets NASA-STD-8739.2 Paragraphs 12.8.2 (b) (1) through 12.8.2 (b
37、) (15) requirements. c. Solder fillet is present 100% around the circumference of the column. d. For columns made with solder dipped copper wrap (copper reinforced columns) there shall be complete solder coverage on the entire column. e. Columns shall appear uniform with no indication of bending or
38、tilting. f. All column locations and dimensions shall comply with the device manufacturers drawing. 4.2.4 Column Coplanarity Suppliers shall establish requirements for coplanarity and provide objective evidence to the GSFC project that it produces reliable hardware. Reliability Note 4.2: Part vendor
39、 guidelines circa 2010 specify co-planarity of the columns to be 0.15 mm (0.0059 in) or better, as measured from the worst case column to reference plane to ensure high quality CCGA attachments. It is strongly recommended that this value be imposed on the purchasing documentation (e.g. purchase orde
40、r or source control drawing). 4.2.5 Solder Mask Inspection Boards shall be 100% inspected at 10X magnification prior to use for any solder mask damage within the CCGA package pattern. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-GSFC-STD-6001 10 o
41、f 21 4.2.6 CCGA Land Area Inspection Boards shall be 100% inspected prior to use for any pad damage within the CCGA package pattern. 4.2.7 Use of Units Rejected during Screening A part (PWB or CCGA) which is found to be defective per the screening criteria in Sections 4.2.3, Visual Inspection, throu
42、gh 4.2.6, CCGA Land Area Inspection, requires review and approval by the GSFC project via its Problem Report/Problem Failure Report (PR/PFR) process prior to its use. 4.3 PRINTED CIRCUIT BOARD DESIGN 4.3.1 Mechanical Design Analysis and Design Approval Mechanical analysis shall be performed to verif
43、y that the designed part placement, board design, and board retention system will not overstress high quality CCGA solder joints over mission environmental conditions. The mechanical analysis shall address solder joint fracture from mechanical stress (vibration and shock) as well as from thermal str
44、ess (mismatch induced fatigue). The temperature range and added temperature range margin used in the analysis shall be defined in the final report. Any applicable part clamps or staking shall also be addressed. Flight production shall not proceed until the mechanical design analysis is reviewed and
45、approved by the GSFC project PDL. Reliability Note 4.3: Polyimide boards are preferred when using CCGA packages, due to their lower CTE when compared to epoxy-glass boards. 4.3.2 Board Flatness Board bow and twist shall be controlled in accordance with IPC-6012, Paragraph 3.4.3 and Appendix A, Class
46、 3/A exception requirement (0.50% maximum for bow and twist). Each board shall be measured for flatness within the CCGA grid, to be 0.003 in or 0.3% across the longest dimension of the CCGA pad location using IPC-TM-650, 2.4.22 to verify this requirement is met. This requirement may be imposed via p
47、rocess specification and verified by supplier measurement. 4.3.3 Solder Surface Finish Solder pads shall have a tin-lead solder or electroless nickel immersion gold (ENIG) finish. Pure tin or other lead free surface plating is not allowed without GSFC project approval. Reliability Note 4.4a: Reliabi
48、lity test data is not widely available for CCGA solder joints with electroless nickel immersion gold (ENIG) board surface plating. ENIG is allowed as long as the gold barrier layer thickness is controlled to less than 0.254 m (see IPC J-STD-001DS.1, Paragraph 3.9.3). Controls on the thickness of the gold through purchase order requirements as well as quality
